删除两个demo

This commit is contained in:
huangruiqiao 2025-04-11 11:34:31 +08:00
parent 8e4a35571a
commit cef3f8b332
506 changed files with 0 additions and 609820 deletions

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# V016REF PHONE
| Project | FreeRTOS | subsys | AT | FOTA | GUI |
| ------- | -------- | ------ | ------- | ------- | ------- |
| driver_example | - | - | - | - | - |
| at_command | √ | √ | √ | - | √ |
| ref_app | √ | √ | √ | √ | √ |

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#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_PSRAM_ENABLE = n
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
DRIVER_APM_ENABLE = y
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
BUILD_AT_QA = n
ifeq ($(BUILD_AT_QA), y)
BUILD_QA_TEST_AT_ENABLE = y
BUILD_QA_TEST_GPIO_ENABLE = y
BUILD_QA_TEST_CHRG_ENABLE = y
endif
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECIDLEP
BUILD_PLAT_MISC_ECIDLEP_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = n
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

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@ -1,768 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_PSRAM_ENABLE = y
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = y
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
DRIVER_FLASHEX_ENABLE = y
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = n
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = n
BUILD_AT_DEBUG = n
BUILD_AT_REF = n
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = n
BUILD_SUPPORT_APP_PCM_MEM_POOL = n
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
ifneq ($(SUBSYS_MEDIA_STREAM_ENABLE),y)
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
else
THIRDPARTY_MBEDTLS_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
endif
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
ifeq ($(AUDIO_FIX_SRC_ENABLE), y)
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
else
BUILD_FIXED_AUDIO_SOURCE_ENABLE = n
endif
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECPRFINFO
BUILD_PLAT_MISC_ECPRFINFO_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBLOCKPLMNLIST
BUILD_PS_DEV_ECBLOCKPLMNLIST_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = y
else
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
endif
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
#AT+ECEHPLMNLIST
BUILD_PS_EMM_ECEHPLMNLIST_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = y
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = y
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = y
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = y
else
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
endif
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

View File

@ -1,780 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_PSRAM_ENABLE = n
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
DRIVER_APM_ENABLE = y
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_JPEGCOMP_ENABLE = n
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
BUILD_AT_QA = n
ifeq ($(BUILD_AT_QA), y)
BUILD_QA_TEST_AT_ENABLE = y
BUILD_QA_TEST_GPIO_ENABLE = y
BUILD_QA_TEST_CHRG_ENABLE = y
endif
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
#AT+ECPRFINFO
BUILD_PLAT_MISC_ECPRFINFO_ENABLE = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
#AT+ECPRFINFO
BUILD_PLAT_MISC_ECPRFINFO_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = n
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
ifeq ($(AUDIO_FIX_SRC_ENABLE), y)
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
else
BUILD_FIXED_AUDIO_SOURCE_ENABLE = n
endif
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = y
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = y
else
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
endif
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = y
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = y
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = y
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = y
else
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
endif
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

View File

@ -1,747 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_PSRAM_ENABLE = y
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECIDLEP
BUILD_PLAT_MISC_ECIDLEP_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBLOCKPLMNLIST
BUILD_PS_DEV_ECBLOCKPLMNLIST_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
#AT+ECEHPLMNLIST
BUILD_PS_EMM_ECEHPLMNLIST_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

View File

@ -1,752 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_PSRAM_ENABLE = n
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
DRIVER_APM_ENABLE = y
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
BUILD_AT_QA = n
ifeq ($(BUILD_AT_QA), y)
BUILD_QA_TEST_AT_ENABLE = y
BUILD_QA_TEST_GPIO_ENABLE = y
BUILD_QA_TEST_CHRG_ENABLE = y
endif
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECIDLEP
BUILD_PLAT_MISC_ECIDLEP_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = n
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

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@ -1,27 +0,0 @@
ifeq ($(CONFIG_PROJ_APP_SECURITY_BOOT), y)
BUILDDIR ?= $(TOP)/PLAT/out/$(TARGET)/$(PROJECT)
EC_SECURE_TOOL := $(TOP)/PLAT/tools/ECSecTools/ECSecTools.exe
EC_SECURE_TOOL_CFG ?= $(TOP)/PLAT/tools/ECSecTools/config_secure.ini
BIN_HEAD_NAME := $(BINNAME)_head
#$(BUILDDIR)/$(BIN_HEAD_NAME).bin: $(BUILDDIR)/$(BINNAME).bin
# $(EC_SECURE_TOOL) genimghd bootloader
#.PHONY: POST_SIGN_STEP
.PHONY: build
POST_SIGN_HEAD_FILE := $(BUILDDIR)/$(BIN_HEAD_NAME).bin
$(POST_SIGN_HEAD_FILE):$(BUILDDIR)/$(BINNAME).elf
$(EC_SECURE_TOOL) --cfgfile $(EC_SECURE_TOOL_CFG) genimghd system
build:$(POST_SIGN_HEAD_FILE)
endif

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@ -1,296 +0,0 @@
AVAILABLE_TARGETS = ec7xx_ref_1h00
TOOLCHAIN = GCC
BINNAME = ap_$(PROJECT)
TOP := ../../../../../../..
# CFLAGS += -DBSP_POS_AXS
CFLAGS += -DEXT_FILES
CFLAGS += -DBSP_MINIDKB_1V1=1
# CFLAGS += -DFEATURE_LCD_TEST_RGB
DRIVER_LCD_ENABLE = n
ifeq ($(DRIVER_LCD_ENABLE),y)
DRIVER_LCD_ST7789_ENABLE = y
DRIVER_LCD_GC9307_ENABLE = n
DRIVER_LCD_AXS15231_ENABLE = n
CFLAGS += -DFEATURE_HAL_SCREEN_ENABLE
endif
SUBSYS_ENABLE = y
LIB_MM_JPEG_USED = y
SUBSYS_SYSLOG_ENABLE = y
SUBSYS_SYSTIME_ENABLE = y
SUBSYS_STORAGE_ENABLE = y
SUBSYS_FLASHEX_ENABLE = y
ifeq ($(SUBSYS_FLASHEX_ENABLE)_$(LFS_EX_DEPEND),y_true)
CFLAGS += -DFLASH_X_ENABLE
endif
SUBSYS_LFSEX_ENABLE = y
SUBSYS_MODE_ENABLE = y
SUBSYS_STATUS_ENABLE = y
SUBSYS_APPHUB_ENABLE = y
SUBSYS_OPENHAL_ENABLE = y
SUBSYS_CONSOLE_ENABLE = n
ifeq ($(SUBSYS_CONSOLE_ENABLE),y)
SUBSYS_UARTSERVICE_ENABLE = y
SUBSYS_FINSH_ENABLE = y
SUBSYS_PYTHON_ENABLE = n
endif
SUBSYS_MEDIA_ENABLE = n
ifeq ($(SUBSYS_MEDIA_ENABLE),y)
SUBSYS_AUDIO_ENABLE = y
SUBSYS_CODEC_ENABLE = y
SUBSYS_MP3_ENABLE = y
SUBSYS_AMR_ENABLE = y
SUBSYS_WAV_ENABLE = y
SUBSYS_PCM_ENABLE = y
SUBSYS_AMR_RECORD_ENABLE = y
SUBSYS_MEDIA_STREAM_ENABLE = n
endif
SUBSYS_GUI_ENABLE = n
SUBSYS_GUI_LVGL_ENABLE = n
SUBSYS_ALIPAY_ENABLE = y
DRIVER_CAMERA_ENABLE = n
ifeq ($(DRIVER_CAMERA_ENABLE),y)
CFLAGS += -DFEATURE_DRIVER_CAMERA_ENABLE
endif
ifeq ($(DRIVER_LCD_AXS15231_ENABLE),y)
DRIVER_TP_ENABLE = y
CFLAGS += -DFEATURE_LCD_AXS15231B_ENABLE
CFLAGS += -DFEATURE_DRIVER_LCD_ENABLE
CFLAGS += -DLCD_HEIGHT=480
CFLAGS += -DLCD_WIDTH=320
endif
ifeq ($(DRIVER_LCD_ST7789_ENABLE),y)
DRIVER_TP_FT6336_ENABLE = y
CFLAGS += -DFEATURE_LCD_ST7789_ENABLE
CFLAGS += -DFEATURE_DRIVER_LCD_ENABLE
CFLAGS += -DLCD_HEIGHT=320
CFLAGS += -DLCD_WIDTH=240
endif
ifeq ($(DRIVER_TP_FT6336_ENABLE),y)
CFLAGS += -DFEATURE_TP_FT6336_ENABLE
DRIVER_TP_ENABLE = y
endif
ifeq ($(DRIVER_TP_ENABLE),y)
CFLAGS += -DFEATURE_DRIVER_TP_ENABLE
endif
DRIVER_KEYPAD_ENABLE = n
ifeq ($(DRIVER_KEYPAD_ENABLE),y)
CFLAGS += -DFEATURE_DRIVER_KEYPAD_ENABLE
DRIVER_KPC_ENABLE = y
endif
ifeq ($(DRIVER_KPC_ENABLE),y)
CFLAGS += -DFEATURE_DRIVER_KPC_ENABLE
endif
DRIVER_ADC_ENABLE = y
ifeq ($(DRIVER_ADC_ENABLE),y)
CFLAGS += -DFEATURE_DRIVER_ADC_ENABLE
endif
ifeq ($(EUTRAN_MODE), cat_mode)
EUTRAN_CAT_MODE = y
endif
#if need usb auto adapt support, set to y
#USBNET_AUTO_ADAPT_ENABLE=y
#enable below setting if OPENCPU_MODE is needed
ifeq ($(OPENCPU), true)
OPENCPU_MODE_ENABLE = y
endif
ifeq ($(GCF_ENABLE), true)
GCF_FEATURE_ENABLE = y
endif
ifeq ($(MID_ENABLE), true)
MID_FEATURE_ENABLE = y
endif
ifeq ($(IMS_ENABLE), true)
IMS_MODE_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_ENABLE), true)
IMS_SMSONLY_MODE_ENABLE = y
endif
ifeq ($(AUDIO_ENABLE), true)
AUDIO_MODE_ENABLE = y
endif
ifeq ($(AUDIO_FIX_ENABLE), true)
AUDIO_FIX_SRC_ENABLE = y
endif
ifeq ($(TYPE), ec716s)
ifeq ($(RAM_ENBALE), true)
MORE_RAM_ENABLE = y
endif
endif
ifeq ($(TYPE), ec718p)
#AT+ECDIEXY
BUILD_PLAT_PROD_ECDIEXY_ENABLE = y
endif
ifeq ($(ROM_ENABLE), true)
MORE_ROM_ENABLE = y
endif
ifeq ($(LESS_LOG), true)
LESS_LOG_ENABLE = y
endif
ifeq ($(TYPE), ec718pm)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
ifeq ($(TYPE), ec718um)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
ifeq ($(TYPE), ec718sm)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
ifeq ($(TYPE), ec718hm)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
#features will be customized to whatever customers want!
include $(TOP)/PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/GCC/FeatCustom_$(TYPE).inc
ifeq ($(EXCEPTION_FLASH_DUMP_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_EXCEPTION_FLASH_DUMP_ENABLE
endif
ifeq ($(MIDDLEWARE_AMR_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_AMR_CP_ENABLE
endif
ifeq ($(MIDDLEWARE_VEM_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_VEM_CP_ENABLE
endif
ifeq ($(IMS_ENABLE), true)
CFLAGS_DEFS += -DFEATURE_IMS_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_CC_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_SMS_ENABLE
ifneq ($(findstring $(TYPE), ec718p ec718u),)
CFLAGS_DEFS += -DFEATURE_IMS_USE_PSRAM_ENABLE
endif
CFLAGS_DEFS += -DFEATURE_IMS_EMC_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_UT_ENABLE
CFLAGS_DEFS += -fno-strict-aliasing
endif
ifeq ($(IMS_SMSONLY_ENABLE), true)
CFLAGS_DEFS += -DFEATURE_IMS_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_SMS_ENABLE
CFLAGS_DEFS += -fno-strict-aliasing
# NO FEATURE_IMS_CC_ENABLE
endif
ifeq ($(AUDIO_ENABLE), true)
ifeq ($(BUILD_SUPPORT_APP_PCM_MEM_POOL), y)
CFLAGS_DEFS += -DFEATURE_SUPPORT_APP_PCM_MEM_POOL
endif
CFLAGS_DEFS += -DFEATURE_AUDIO_ENABLE
endif
ifneq ($(findstring $(TYPE), ec716s ec716e),)
ifeq ($(RAM_ENBALE), true)
CFLAGS_DEFS += -DFEATURE_MORERAM_ENABLE
endif
endif
ifeq ($(ROM_ENABLE), true)
CFLAGS_DEFS += -DFEATURE_MOREROM_ENABLE
endif
ifeq ($(LESS_LOG), true)
CFLAGS_DEFS += -DFEATURE_LESSLOG_ENABLE
endif
ifeq ($(THIRDPARTY_CMCC_DM_ENABLE), y)
THIRDPARTY_CISONENET_ENABLE = y
THIRDPARTY_ERCOAP_ENABLE = y
endif
#ensure AT command to be consistent with protocol
#such as mqtt/...
ifeq ($(THIRDPARTY_MQTT_ENABLE), n)
BUILD_PLAT_MQTT_AT_ENABLE = n
endif
ifeq ($(THIRDPARTY_HTTPC_ENABLE), n)
BUILD_PLAT_HTTP_AT_ENABLE = n
endif
ifeq ($(THIRDPARTY_MBEDTLS_ENABLE), n)
BUILD_PLAT_SSL_AT_ENABLE = n
endif
ifeq ($(MIDDLEWARE_FOTAPAR_ENABLE), n)
BUILD_PLAT_FOTA_AT_ENABLE = n
BUILD_PLAT_ECOTA_AT_ENABLE = n
endif
CFLAGS_INC += -I ../inc \
-I ../lfs \
-I $(TOP)/FIRMWARE/SRC/CAT1/Common/Inc \
-I $(TOP)/PLAT/driver/chip/$(CHIP)/ap/src/usb
obj-y += PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/main.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/main_app.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/input_proc.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/bsp_custom.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/lfs/merged.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/main_alipay.o
#CONFIG_PROJ_APP_SECURITY_BOOT = y
include $(TOP)/PLAT/tools/scripts/Makefile.rules
#configure USBNET_AUTO_ADAPT_ENABLE in ".\device\target\board\%BOARD_NAME%\ap\%BOARD_NAME%_ap.mk"'
ifeq ($(USBNET_AUTO_ADAPT_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_USBNET_ATA_FOR_AP
CFLAGS_DEFS += -DFEATURE_FIX_REMOTE_WKUP_UNPAIRED_CASE
endif
#enable wdt
CFLAGS += -DWDT_FEATURE_ENABLE=1
CFLAGS += -DFEATURE_UART_HELP_DUMP_ENABLE
#Enable SIM hotswap feature with pad configration and jitter handle by required----don't remove it
#CFLAGS += -DSIM_HOT_SWAP_FEATURE
#Make all warnings into errors
# CFLAGS += -Werror
ifneq ($(OPENCPU_MODE_ENABLE),y)
ifneq ($(BUILD_AT),y)
$(error This example needs to modify "BUILD_AT" to "y" in device\target\board\$(TARGET)\$(CORE)\$(TARGET)_$(CORE).mk)
endif
endif

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@ -1,72 +0,0 @@
# lcd demo
|LCD DEMO | [RGB](#rgb) | [LVGL](#lvgl) |
| ------- | ----- | ----- |
| ST7789 | √ | √ |
| AXS15231 | √ | √ |
通过**Makefile**相关宏可指定LSPI频率、DataLane和LCD长宽等参数
```bash
CFLAGS += -DLCD_SPI_DATA_LANE=1
CFLAGS += -DLCD_HEIGHT=320
CFLAGS += -DLCD_WIDTH=240
CFLAGS += -DSPI_SPEED_MHz=51
```
如下相关测试均基于miniDKB硬件不同硬件可能需要修改相关参数定义
```bash
./ec718p_openbuild_ref_1h00.sh lcd_demo
.\ec718p_openbuild_ref_1h00.bat lcd_demo
```
```bash
Memory region Used Size Region Size %age Used
ASMB_AREA: 64 KB 64 KB 100.00%
MSMB_AREA: 1304548 B 1280 KB 99.53%
FLASH_AREA: 1886792 B 3220 KB 57.22%
PSRAM_AREA: 352 KB 2 MB 17.19%
available size: 1388516, real image size(aligned):1851420
```
### RGB
用于测试LCD传输帧率实现方式是将固定PSRAM数据直接搬运
需要在makefile中添加相关定义以使能相关测试
```bash
CFLAGS += -DFEATURE_LCD_TEST_RGB
```
```bash
./ec718p_openbuild_ref_1h00.sh lcd_demo
.\ec718p_openbuild_ref_1h00.bat lcd_demo
```
linux环境下编译8 seconds
```bash
Memory region Used Size Region Size %age Used
ASMB_AREA: 64 KB 64 KB 100.00%
MSMB_AREA: 1304548 B 1280 KB 99.53%
FLASH_AREA: 1330620 B 3172 KB 40.97%
PSRAM_AREA: 1500 KB 2 MB 73.24%
```
window环境下编译1 minutes 41 seconds
```bash
Memory region Used Size Region Size %age Used
ASMB_AREA: 64 KB 64 KB 100.00%
MSMB_AREA: 1304548 B 1280 KB 99.53%
FLASH_AREA: 1330716 B 3172 KB 40.97%
PSRAM_AREA: 1500 KB 2 MB 73.24%
```
**编译前请主动清空以避免干扰:ec718p_openbuild_ref_1h00.bat clall**
```bash
ec718p_openbuild_ref_1h00.bat clean //只会清除默认工程其余demo不会清理
ec718p_openbuild_ref_1h00.bat clall //清除该工程下的所有demo编译文件
```
关掉PWM控制会失去LVGL时钟导致无法调度需要先适配新的时钟接口
```bash
CFLAGS += -DLCD_BL_PWM_ENABLE
```

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#ifndef __RTE_DEVICE_H
#define __RTE_DEVICE_H
#include "ec7xx.h"
#ifdef BSP_POS_AXS
//choose backLight
#define BK_USE_GPIO 1
#define BK_USE_PWM 0
//enable LDO
#define ENABLE_LDO 1
//choose spi data lane
#define SPI_2_DATA_LANE 1
//choose one lcd
#define LCD_AXS15231_ENABLE 1
#define TP_IRQ_GPIO_INSTANCE (1)
#define TP_IRQ_GPIO_PIN (4)
#define TP_IRQ_PAD_INDEX (45)
#define TP_IRQ_PAD_ALT_FUNC (PAD_MUX_ALT0)
// #define LCD_RST_GPIO_INSTANCE (1)
// #define LCD_RST_GPIO_PIN (11)
// #define LCD_RST_PAD_INDEX (52)
// #define LCD_RST_PAD_ALT_FUNC (PAD_MUX_ALT0)
#define LCD_RST_GPIO_INSTANCE (0)
#define LCD_RST_GPIO_PIN (15)
#define LCD_RST_PAD_INDEX (30)
#define LCD_RST_PAD_ALT_FUNC (PAD_MUX_ALT0)
#define LCD_BK_GPIO_INSTANCE (1)
#define LCD_BK_GPIO_PIN (7)
#define LCD_BK_PAD_INDEX (48)
#define LCD_BK_PAD_ALT_FUNC (PAD_MUX_ALT0)
#define LCD_EN_GPIO_INSTANCE (1)
#define LCD_EN_GPIO_PIN (5)
#define LCD_EN_PAD_INDEX (46)
#define LCD_EN_PAD_ALT_FUNC (PAD_MUX_ALT0)
#define CAM_PD_GPIO_INSTANCE (0)
#define CAM_PD_GPIO_PIN (5)
#define CAM_PD_PAD_INDEX (20)
#define CAM_PD_PAD_ALT_FUNC (PAD_MUX_ALT0)
#define ENABLE_CAMERA_LDO 1
#elif BSP_MINIDKB_1V1
#define BK_USE_PWM 1
//choose spi data lane
#define SPI_2_DATA_LANE 0
#define SPI_1_DATA_LANE 1
//choose one lcd
#define LCD_ST7789_ENABLE 1
#define LCD_AXS15231_ENABLE 0
#define TP_RST_GPIO_INSTANCE (1)
#define TP_RST_GPIO_PIN (2)
#define TP_RST_PAD_INDEX (13)
#define TP_RST_PAD_ALT_FUNC (PAD_MUX_ALT4)
#define TP_IRQ_GPIO_INSTANCE (2)
#define TP_IRQ_GPIO_PIN (4)
#define TP_IRQ_PAD_INDEX (42)
#define TP_IRQ_PAD_ALT_FUNC (PAD_MUX_ALT0)
#define LCD_RST_GPIO_INSTANCE (1)
#define LCD_RST_GPIO_PIN (3)
#define LCD_RST_PAD_INDEX (14)
#define LCD_RST_PAD_ALT_FUNC (PAD_MUX_ALT4)
#define LCD_BK_GPIO_INSTANCE (0)
#define LCD_BK_GPIO_PIN (1)
#define LCD_BK_PAD_INDEX (16)
#define LCD_BK_PAD_ALT_FUNC (PAD_MUX_ALT0)
#elif BSP_NEWMAN_560
#define BK_USE_PWM 1
//choose spi data lane
#define SPI_1_DATA_LANE 1
//choose one lcd
#define LCD_ST7789_ENABLE 1
#define TP_RST_GPIO_INSTANCE (1)
#define TP_RST_GPIO_PIN (2)
#define TP_RST_PAD_INDEX (13)
#define TP_RST_PAD_ALT_FUNC (PAD_MUX_ALT4)
#define TP_IRQ_GPIO_INSTANCE (2)
#define TP_IRQ_GPIO_PIN (4)
#define TP_IRQ_PAD_INDEX (42)
#define TP_IRQ_PAD_ALT_FUNC (PAD_MUX_ALT0)
#define LCD_RST_GPIO_INSTANCE (1)
#define LCD_RST_GPIO_PIN (3)
#define LCD_RST_PAD_INDEX (14)
#define LCD_RST_PAD_ALT_FUNC (PAD_MUX_ALT4)
#define LCD_BK_GPIO_INSTANCE (0)
#define LCD_BK_GPIO_PIN (1)
#define LCD_BK_PAD_INDEX (16)
#define LCD_BK_PAD_ALT_FUNC (PAD_MUX_ALT0)
#define PA_EN_GPIO_INSTANCE (1)
#define PA_EN_GPIO_PIN (12)
#define PA_EN_PAD_ALT_INDEX (53)
#define PA_EN_PAD_ALT_FUNC (PAD_MUX_ALT0)
#endif
#define LCD_PWM_INSTANCE (0)
#define LCD_PWM_OUT_PAD (LCD_BK_PAD_INDEX)
#define LCD_PWM_PAD_ALT_SEL (PAD_MUX_ALT5)
#define LCD_PWM_CLOCK_ID (FCLK_TIMER0)
#define LCD_PWM_INSTANCE_IRQ (PXIC0_TIMER0_IRQn)
#define LCD_PWM_CLOCK_SOURCE (FCLK_TIMER0_SEL_26M)
#define LSPI_RST_GPIO_INSTANCE LCD_RST_GPIO_INSTANCE
#define LSPI_RST_GPIO_PIN LCD_RST_GPIO_PIN
#define LSPI_RST_GPIO_ADDR LCD_RST_PAD_INDEX
#define LSPI_RST_PAD_ALT_FUNC LCD_RST_PAD_ALT_FUNC
#define POLLING_MODE 0x1
#define DMA_MODE 0x2
#define IRQ_MODE 0x3
#define UNILOG_MODE 0x4
#define RTE_UART0_TX_IO_MODE UNILOG_MODE
#ifdef TYPE_EC718M
#define RTE_UART0_RX_IO_MODE IRQ_MODE // Use IRQ_MODE instead of DMA_MODE coz we'll have no chance to enter psram Hybd sleep
#else
#define RTE_UART0_RX_IO_MODE DMA_MODE
#define USART0_RX_TRIG_LVL (30)
#endif
#define RTE_UART1_TX_IO_MODE DMA_MODE
#define RTE_UART1_RX_IO_MODE DMA_MODE
#define RTE_UART2_TX_IO_MODE DMA_MODE
#define RTE_UART2_RX_IO_MODE DMA_MODE
#define RTE_UART3_TX_IO_MODE DMA_MODE
#define RTE_UART3_RX_IO_MODE DMA_MODE
#define RTE_SPI0_IO_MODE DMA_MODE
#define RTE_SPI1_IO_MODE POLLING_MODE
#define RTE_I2C0_IO_MODE POLLING_MODE
#define RTE_I2C1_IO_MODE POLLING_MODE
// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
#define RTE_I2C0 1
#ifdef BSP_POS_AXS
#define RTE_I2C0_SCL_BIT 13
#define RTE_I2C0_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C0_SDA_BIT 14
#define RTE_I2C0_SDA_FUNC PAD_MUX_ALT2
#else
// { PAD_PIN30}, // 0 : gpio15 / 2: I2C0_SCL
// { PAD_PIN29}, // 0 : gpio14 / 2: I2C0_SDA
#define RTE_I2C0_SCL_BIT 30
#define RTE_I2C0_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C0_SDA_BIT 29
#define RTE_I2C0_SDA_FUNC PAD_MUX_ALT2
#endif
// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
#define RTE_I2C1 0
// { PAD_PIN20}, // 0 : gpio5 / 2 : I2C1 SCL
// { PAD_PIN19}, // 0 : gpio4 / 2 : I2C1 SDA
#define RTE_I2C1_SCL_BIT 20
#define RTE_I2C1_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C1_SDA_BIT 19
#define RTE_I2C1_SDA_FUNC PAD_MUX_ALT2
// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
// Configuration settings for Driver_USART0 in component ::Drivers:USART
#define RTE_UART0 1
#define RTE_UART0_CTS_PIN_EN 0
#define RTE_UART0_RTS_PIN_EN 0
#if defined CHIP_EC718
// { PAD_PIN42}, // 0 : gpio36 / 3 : UART0 RTSn
// { PAD_PIN43}, // 0 : gpio37 / 3 : UART0 CTSn
// { PAD_PIN31}, // 0 : gpio16 / 1 : UART0 RXD
// { PAD_PIN32}, // 0 : gpio17 / 1 : UART0 TXD
#define RTE_UART0_RTS_BIT 42
#define RTE_UART0_RTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_CTS_BIT 43
#define RTE_UART0_CTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_RX_BIT 31
#define RTE_UART0_RX_FUNC PAD_MUX_ALT1
#define RTE_UART0_TX_BIT 32
#define RTE_UART0_TX_FUNC PAD_MUX_ALT1
#elif defined CHIP_EC716
// { PAD_PIN14}, // 0 : gpio2 / 5 : UART0 RTSn
// { PAD_PIN15}, // 0 : gpio3 / 5 : UART0 CTSn
// { PAD_PIN18}, // 0 : gpio6 / 1 : UART0 RXD
// { PAD_PIN19}, // 0 : gpio7 / 1 : UART0 TXD
#define RTE_UART0_RTS_BIT 14
#define RTE_UART0_RTS_FUNC PAD_MUX_ALT5
#define RTE_UART0_CTS_BIT 15
#define RTE_UART0_CTS_FUNC PAD_MUX_ALT5
#define RTE_UART0_RX_BIT 18
#define RTE_UART0_RX_FUNC PAD_MUX_ALT1
#define RTE_UART0_TX_BIT 19
#define RTE_UART0_TX_FUNC PAD_MUX_ALT1
#endif
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_TX_REQID DMA_REQUEST_USART0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_RX_REQID DMA_REQUEST_USART0_RX
// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
// Configuration settings for Driver_USART1 in component ::Drivers:USART
#define RTE_UART1 1
#define RTE_UART1_CTS_PIN_EN 0
#define RTE_UART1_RTS_PIN_EN 0
#if defined CHIP_EC718
// { PAD_PIN27}, // 0 : gpio12 / 2 : UART1 RTS
// { PAD_PIN28}, // 0 : gpio13 / 2 : UART1 CTS
// { PAD_PIN33}, // 0 : gpio18 / 1 : UART1 RXD
// { PAD_PIN34}, // 0 : gpio19 / 1 : UART1 TXD
#define RTE_UART1_RTS_BIT 27
#define RTE_UART1_RTS_FUNC PAD_MUX_ALT2
#define RTE_UART1_CTS_BIT 28
#define RTE_UART1_CTS_FUNC PAD_MUX_ALT2
#define RTE_UART1_RX_BIT 33
#define RTE_UART1_RX_FUNC PAD_MUX_ALT1
#define RTE_UART1_TX_BIT 34
#define RTE_UART1_TX_FUNC PAD_MUX_ALT1
#elif defined CHIP_EC716
// { PAD_PIN16}, // 0 : gpio4 / 5 : UART1 RTS
// { PAD_PIN17}, // 0 : gpio5 / 5 : UART1 CTS
// { PAD_PIN20}, // 0 : gpio8 / 1 : UART1 RXD
// { PAD_PIN21}, // 0 : gpio9 / 1 : UART1 TXD
#define RTE_UART1_RTS_BIT 16
#define RTE_UART1_RTS_FUNC PAD_MUX_ALT5
#define RTE_UART1_CTS_BIT 17
#define RTE_UART1_CTS_FUNC PAD_MUX_ALT5
#define RTE_UART1_RX_BIT 20
#define RTE_UART1_RX_FUNC PAD_MUX_ALT1
#define RTE_UART1_TX_BIT 21
#define RTE_UART1_TX_FUNC PAD_MUX_ALT1
#endif
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_TX_REQID DMA_REQUEST_USART1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_RX_REQID DMA_REQUEST_USART1_RX
// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
// Configuration settings for Driver_USART2 in component ::Drivers:USART
#define RTE_UART2 0
// { PAD_PIN25}, // 0 : gpio10 / 3 : UART2 RXD
// { PAD_PIN26}, // 0 : gpio11 / 3 : UART2 TXD
#define RTE_UART2_RX_BIT 27
#define RTE_UART2_RX_FUNC PAD_MUX_ALT3
#define RTE_UART2_TX_BIT 28
#define RTE_UART2_TX_FUNC PAD_MUX_ALT3
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_TX_REQID DMA_REQUEST_USART2_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_RX_REQID DMA_REQUEST_USART2_RX
#define RTE_UART3 0
// { PAD_PIN29}, // 0 : gpio14 / 3 : UART3 RXD
// { PAD_PIN30}, // 0 : gpio15 / 3 : UART3 TXD
#define RTE_UART3_RX_BIT 29
#define RTE_UART3_RX_FUNC PAD_MUX_ALT3
#define RTE_UART3_TX_BIT 30
#define RTE_UART3_TX_FUNC PAD_MUX_ALT3
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART3_DMA_TX_REQID DMA_REQUEST_USART3_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART3_DMA_RX_REQID DMA_REQUEST_USART3_RX
// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
#define RTE_SPI0 1
// { PAD_PIN23}, // 0 : gpio8 / 1 : SPI0 SSn
// { PAD_PIN24}, // 0 : gpio9 / 1 : SPI0 MOSI
// { PAD_PIN25}, // 0 : gpio10 / 1 : SPI0 MISO
// { PAD_PIN26}, // 0 : gpio11 / 1 : SPI0 SCLK
#define RTE_SPI0_SSN_BIT 23
#define RTE_SPI0_SSN_FUNC PAD_MUX_ALT1
#define RTE_SPI0_MOSI_BIT 24
#define RTE_SPI0_MOSI_FUNC PAD_MUX_ALT1
#define RTE_SPI0_MISO_BIT 25
#define RTE_SPI0_MISO_FUNC PAD_MUX_ALT1
#define RTE_SPI0_SCLK_BIT 26
#define RTE_SPI0_SCLK_FUNC PAD_MUX_ALT1
#define RTE_SPI0_SSN_GPIO_INSTANCE 0
#define RTE_SPI0_SSN_GPIO_INDEX 8
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_TX_REQID DMA_REQUEST_SPI0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_RX_REQID DMA_REQUEST_SPI0_RX
// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
#define RTE_SPI1 0
// { PAD_PIN27}, // 0 : gpio12 / 1 : SPI1 SSn
// { PAD_PIN28}, // 0 : gpio13 / 1 : SPI1 MOSI
// { PAD_PIN29}, // 0 : gpio14 / 1 : SPI1 MISO
// { PAD_PIN30}, // 0 : gpio15 / 1 : SPI1 SCLK
// { PAD_PIN26}, // 0 : gpio11 / 2 : SPI1 SSn1
#define RTE_SPI1_SSN_BIT 27
#define RTE_SPI1_SSN_FUNC PAD_MUX_ALT1
#define RTE_SPI1_MOSI_BIT 28
#define RTE_SPI1_MOSI_FUNC PAD_MUX_ALT1
#define RTE_SPI1_MISO_BIT 29
#define RTE_SPI1_MISO_FUNC PAD_MUX_ALT1
#define RTE_SPI1_SCLK_BIT 30
#define RTE_SPI1_SCLK_FUNC PAD_MUX_ALT1
#define RTE_SPI1_SSN_GPIO_INSTANCE 0
#define RTE_SPI1_SSN_GPIO_INDEX 12
#define RTE_SPI1_SSN1_BIT 26
#define RTE_SPI1_SSN1_FUNC PAD_MUX_ALT2
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_TX_REQID DMA_REQUEST_SPI1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_RX_REQID DMA_REQUEST_SPI1_RX
// PWM0 Controller [Driver_PWM0]
// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
#define RTE_PWM 1
#define EFUSE_INIT_MODE POLLING_MODE
#define L2CTLS_INIT_MODE POLLING_MODE
#define FLASH_BARE_RW_MODE 1
/////////////////////////// Lcd Configuration Start////////////////////////////////////////////////////
// LSPI2 Configuration
#define RTE_LSPI2 1
// Step3 choose interface
#define LCD_INTERFACE_SPI 1
// Step5 choose IO voltage
#define LCD_IO_VOLTAGE (IOVOLT_3_00V)
// Step12 choose lcd pinmux
// Step12.1 choose spi pinmux
#if (LCD_INTERFACE_SPI == 1)
#define RTE_USP2_DS_PAD_ADDR 44 // DS: gpio38
#define RTE_USP2_DS_FUNC PAD_MUX_ALT2
#define RTE_USP2_CLK_PAD_ADDR 40 // clock: gpio34
#define RTE_USP2_CLK_FUNC PAD_MUX_ALT1
#define RTE_USP2_CS_PAD_ADDR 41 // cs: gpio35
#define RTE_USP2_CS_FUNC PAD_MUX_ALT1
#define RTE_USP2_DIN_PAD_ADDR 42 // miso: gpio36
#define RTE_USP2_DIN_FUNC PAD_MUX_ALT1
#define RTE_USP2_DOUT0_PAD_ADDR 43 // mosi: gpio37
#define RTE_USP2_DOUT0_FUNC PAD_MUX_ALT1
#if (SPI_2_DATA_LANE == 1)
#define RTE_USP2_DOUT1_PAD_ADDR 44 // DS: gpio38
#define RTE_USP2_DOUT1_FUNC PAD_MUX_ALT2
#endif
#endif
/////////////////////////// Lcd Configuration End//////////////////////////////////////////////////////
/////////////////////////// Camera Configuration Start////////////////////////////////////////////////////
// CSPI1 Configuration
#define RTE_CSPI1 1
#define RTE_CSPI1_MCLK_PAD_ADDR 18
#define RTE_CSPI1_MCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_PCLK_PAD_ADDR 19
#define RTE_CSPI1_PCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_CS_PAD_ADDR 20
#define RTE_CSPI1_CS_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_SDO0_PAD_ADDR 21
#define RTE_CSPI1_SDO0_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_SDO1_PAD_ADDR 22
#define RTE_CSPI1_SDO1_FUNC PAD_MUX_ALT1
// DMA CSPI1 Request ID
#define RTE_CSPI1_DMA_RX_REQID DMA_REQUEST_USP1_RX
// Choose camera version
#define CAMERA_ENABLE_SP0A39 0 ///< SP0A39 enable
#define SP0A39_2SDR 0 ///< SP0A39 2 wire
#define SP0A39_1SDR 0 ///< SP0A39 1 wire
#if (CAMERA_ENABLE_SP0A39 == 1)
#define CAM_CHAIN_COUNT CAM_30W
#endif
#define CAMERA_ENABLE_SP0821 0 ///< SP0821 enable
#define SP0821_2SDR 0 ///< SP0821 2 wire
#define SP0821_1SDR 0 ///< SP0821 1 wire
#if (CAMERA_ENABLE_SP0821 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
#define CAMERA_ENABLE_GC6123 0 ///< GC6123 enable
#define GC6123_2SDR 1 ///< GC6123 2 wire
#define GC6123_1SDR 0 ///< GC6123 1 wire
#if (CAMERA_ENABLE_GC6123 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
#define CAMERA_ENABLE_GC032A 1 ///< GC032A enable
#define GC032A_2SDR 0 ///< GC6123 2 wire
#define GC032A_1SDR 0 ///< GC6123 1 wire
#define GC032A_2DDR 1 ///< GC6123 1 wire
#if (CAMERA_ENABLE_GC032A == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR // use 8w to save decode's memory
#endif
#define CAMERA_ENABLE_BF30A2 0 ///< BF30A2 enable
#define BF30A2_1SDR 1 ///< BF30A2 1 wire
#if (CAMERA_ENABLE_BF30A2 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
#define CAMERA_ENABLE_GC6153 0 ///< GC6123 enable
#define GC6153_1SDR 1 ///< GC6123 1 wire
#if (CAMERA_ENABLE_GC6153 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
#if ((CAMERA_ENABLE_GC032A == 1))
#define PIC_SRC_HEIGHT 480
#define PIC_SRC_WIDTH 640
#else
#define PIC_SRC_HEIGHT 240
#define PIC_SRC_WIDTH 320
#endif
#if (ENABLE_CAMERA_LDO == 1)
#define CAM_PD_GPIO_INSTANCE (0)
#define CAM_PD_GPIO_PIN (5)
#define CAM_PD_PAD_INDEX (20)
#define CAM_PD_PAD_ALT_FUNC (PAD_MUX_ALT0)
#endif
/*
static configuration for USB/UART relatded feature
RTE_USB_EN: whether init USB stack
RTE_ONE_UART_AT: enable one UART AT
RTE_ONE_UART_AT: enable two UART AT
RTE_ETHER_EN : whehter RNDIS/ECM feature is enabled
RTE_PPP_EN : whehter PPPOS feature is enabled
RTE_OPAQ_EN : whehter OPAQOS feature is enabled
*/
#if (defined OPEN_CPU_MODE)
/* device */
#define RTE_USB_EN 1
#define RTE_ONE_UART_AT 1
#define RTE_TWO_UART_AT 0
/* feature */
#define RTE_ETHER_EN 0
#define RTE_OPAQ_EN 0
#else
/* device */
#define RTE_USB_EN 1
#define RTE_ONE_UART_AT 1
#define RTE_TWO_UART_AT 0
/* feature */
#if (RTE_USB_EN == 1)
#define RTE_ETHER_EN 1 /* 0/1: to ctrl eth(rndis/ecm) independently! */
#ifdef FEATURE_USB_CCID_ENABLE
#define RTE_CCID_EN 1 /* 0/1: to ctrl ccid independently! */
#else
#define RTE_CCID_EN 0 /* 0/1: to ctrl ccid independently! */
#endif
#else
#define RTE_ETHER_EN RTE_USB_EN /* must be the same(disabled) */
#define RTE_CCID_EN RTE_USB_EN /* 0/1: to ctrl ccid independently! */
#endif
#define RTE_OPAQ_EN 0
#endif
#ifdef FEATURE_PPP_ENABLE
#define RTE_PPP_EN 1
#else
#define RTE_PPP_EN 0
#endif
/* to be compatible with old style */
#define RTE_RNDIS_EN RTE_ETHER_EN
#if (defined FEATURE_AUDIO_ENABLE)
#define RTE_AUDIO_EN 1
#define AUDIO_BOARD_NMA_SUPPORT 1
#else
#define RTE_AUDIO_EN 0
#endif
#if (RTE_ONE_UART_AT == 1)
#define RTE_UART0 1
#define RTE_UART1 1
#define RTE_UART2 0
#elif (RTE_TWO_UART_AT == 1)
#define RTE_UART0 1
#define RTE_UART1 1
#define RTE_UART2 1
#endif
/* to enable external thermal */
#define EXTERNAL_NTC_EXIST 0
#define RTE_LPUART_EN 1
#if (RTE_UART1 == 1)
#define UART1_DTR_PAD_INDEX 26 // GPIO11
#define UART1_DTR_GPIO_INSTANCE 0
#define UART1_DTR_GPIO_PIN 11
#define UART1_RI_PAD_INDEX 44 // AONIO 4 = GPIO24
#define UART1_RI_GPIO_INSTANCE 1
#define UART1_RI_GPIO_PIN 8
#define UART1_RI_PWM_INSTANCE 1
#define UART1_RI_PWM_CLK_ID FCLK_TIMER1
#define UART1_RI_PWM_CLK_SEL FCLK_TIMER1_SEL_26M
#define UART1_DCD_PAD_INDEX 45 // AONIO 5 = GPIO25
#define UART1_DCD_GPIO_INSTANCE 1
#define UART1_DCD_GPIO_PIN 9
#endif
#if (RTE_UART2 == 1)
#define UART2_DTR_PAD_INDEX 25 // GPIO10
#define UART2_DTR_GPIO_INSTANCE 0
#define UART2_DTR_GPIO_PIN 10
#define UART2_RI_PAD_INDEX 43 // AONIO 3 = GPIO23
#define UART2_RI_GPIO_INSTANCE 1
#define UART2_RI_GPIO_PIN 7
#define UART2_RI_PWM_INSTANCE 0
#define UART2_RI_PWM_CLK_ID FCLK_TIMER0
#define UART2_RI_PWM_CLK_SEL FCLK_TIMER0_SEL_26M
#define UART2_DCD_PAD_INDEX 47 // AONIO 7 = GPIO27
#define UART2_DCD_GPIO_INSTANCE 1
#define UART2_DCD_GPIO_PIN 11
#endif
#define NETLIGHT_PAD_INDEX 51 // AONIO 6 = GPIO26
#define NETLIGHT_PAD_ALT_FUNC PAD_MUX_ALT5
#define NETLIGHT_PWM_INSTANCE 3
//USIM1 OPTION1
#if defined CHIP_EC718
#define USIM1_URST_OP1_PAD_INDEX 19 // GPIO4
#define USIM1_URST_OP1_GPIO_INSTANCE 0
#define USIM1_URST_OP1_GPIO_PIN 4
#define USIM1_UCLK_OP1_PAD_INDEX 20 // GPIO5
#define USIM1_UCLK_OP1_GPIO_INSTANCE 0
#define USIM1_UCLK_OP1_GPIO_PIN 5
#define USIM1_UIO_OP1_PAD_INDEX 21 // GPIO6
#define USIM1_UIO_OP1_GPIO_INSTANCE 0
#define USIM1_UIO_OP1_GPIO_PIN 6
#elif defined CHIP_EC716
#define USIM1_URST_OP1_PAD_INDEX 13 // GPIO1
#define USIM1_URST_OP1_GPIO_INSTANCE 0
#define USIM1_URST_OP1_GPIO_PIN 1
#define USIM1_UCLK_OP1_PAD_INDEX 14 // GPIO2
#define USIM1_UCLK_OP1_GPIO_INSTANCE 0
#define USIM1_UCLK_OP1_GPIO_PIN 2
#define USIM1_UIO_OP1_PAD_INDEX 15 // GPIO3
#define USIM1_UIO_OP1_GPIO_INSTANCE 0
#define USIM1_UIO_OP1_GPIO_PIN 3
#endif
//USIM1 OPTION2
#define USIM1_UIO_OP2_PAD_INDEX 27 // GPIO12
#define USIM1_UIO_OP2_GPIO_INSTANCE 0
#define USIM1_UIO_OP2_GPIO_PIN 12
#define USIM1_URST_OP2_PAD_INDEX 28 // GPIO13
#define USIM1_URST_OP2_GPIO_INSTANCE 0
#define USIM1_URST_OP2_GPIO_PIN 13
#define USIM1_UCLK_OP2_PAD_INDEX 29 // GPIO14
#define USIM1_UCLK_OP2_GPIO_INSTANCE 0
#define USIM1_UCLK_OP2_GPIO_PIN 14
//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
#if defined CHIP_EC718
#define AONIO_6_PAD_INDEX 46 // AONIO 6 = GPIO26
#define AONIO_6_GPIO_INSTANCE 1
#define AONIO_6_GPIO_PIN 10
#elif defined CHIP_EC716
#define AONIO_6_PAD_INDEX 28 // AONIO 6 = GPIO16
#define AONIO_6_GPIO_INSTANCE 1
#define AONIO_6_GPIO_PIN 0 //GPIO16, (16 % 16)
#endif
#ifdef SIM_HOT_SWAP_FEATURE
#define TIMER_INSTANCE_4 4
#endif
//////////////////////////////////////////////////////////////////////////////////////////////
// I2S Setting field Start
// All the I2S's parameters that need user to set are all put here
//////////////////////////////////////////////////////////////////////////////////////////////
// I2S0 Configuration
#define RTE_I2S0 1
#define RTE_I2S0_MCLK_PAD_ADDR 39
#define RTE_I2S0_MCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S0_BCLK_PAD_ADDR 35
#define RTE_I2S0_BCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S0_LRCK_PAD_ADDR 36
#define RTE_I2S0_LRCK_FUNC PAD_MUX_ALT1
#define RTE_I2S0_DIN_PAD_ADDR 37
#define RTE_I2S0_DIN_FUNC PAD_MUX_ALT1
#define RTE_I2S0_DOUT_PAD_ADDR 38
#define RTE_I2S0_DOUT_FUNC PAD_MUX_ALT1
// I2S1 Configuration
#define RTE_I2S1 0
#define RTE_I2S1_IO_MODE DMA_MODE
#define RTE_I2S1_MCLK_PAD_ADDR 18
#define RTE_I2S1_MCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S1_BCLK_PAD_ADDR 19
#define RTE_I2S1_BCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S1_LRCK_PAD_ADDR 20
#define RTE_I2S1_LRCK_FUNC PAD_MUX_ALT1
#define RTE_I2S1_DIN_PAD_ADDR 21
#define RTE_I2S1_DIN_FUNC PAD_MUX_ALT1
#define RTE_I2S1_DOUT_PAD_ADDR 22
#define RTE_I2S1_DOUT_FUNC PAD_MUX_ALT1
//////////////////////////////////////////////////////////////////////////////////////////////
// I2S Setting field End
//////////////////////////////////////////////////////////////////////////////////////////////
#endif /* __RTE_DEVICE_H */

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#ifndef BSP_CUSTOM_H
#define BSP_CUSTOM_H
#ifdef __cplusplus
extern "C" {
#endif
#include "bsp.h"
/*
the following types define the scenarios of LdoFemVbat,
Scenario type1: LdoFemVbat does NOT reuse to RF FrontEnd (PA and switches) at all;
Scenario type2: LdoFemVbat is used for RF FrontEnd (PA or switches) at all, while also multiplexing other peripherals (such as cameras, vovice codecs, etc);
Scenario type3: LdoFemVbat is only used for RF FrontEnd (PA or switches) and is NOT reused for other peripherals (such as cameras, vovice codecs, etc);
The default setting is Scenario type3.
*/
enum
{
/*For this type1, the application needs to open or close LdoFemVbat on its own.
Please Note that LdoFemVbat will be turned off after entering sleep mode,
after exiting sleep, the application also needs to open LdoFemVbat and re-initialize the relevant peripherals under this power supply.
*/
LDOFEMVBAT_SCENARIO_TYPE1 = 0x0,
/*For this type2, the application needs to re-open LdoFemVbat before each use of peripherals under this power supply,
after use, LdoFemVbat can NOT be turned off (nor can it be turned off) because LdoFemVbat is also used for RF devices (PA or switches).
Meanwhile, due to the sleep mode, the logic implemented by the software will close LdoFemVbat before entering into sleep, and then open after exiting from sleep.
So, the application needs to re-open LdoFemVbat before use.
During the period when the application is using the peripheral, if need to keep LdoFemVbat in a powered state,
it can NOT enter any sleep mode.
*/
LDOFEMVBAT_SCENARIO_TYPE2,
/*For this type3, default mode, application does NOT use LdoFemVbat.*/
LDOFEMVBAT_SCENARIO_TYPE3
};
void BSP_CustomInit(void);
uint32_t BSP_UsbGetVBUSMode(void);
uint32_t BSP_UsbGetVBUSWkupPad(void);
void SimHotSwapInit(void);
#ifdef __cplusplus
}
#endif
#endif /* BSP_CUSTOM_H */

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/****************************************************************************
*
* Copy right: 2023-, Copyrigths of EigenComm Ltd.
* File name: mode.h
* Description: ec7xx mode config entry header file
* History: Rev1.0 2023-11-22
*
****************************************************************************/
#ifndef MODE_CONFIG_H
#define MODE_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
#include "FreeRTOS.h"
#include "ostask.h"
typedef enum Thread_Mode_bits {
THREAD_FLAG_INIT = (1UL << 0),
THREAD_FLAG_NORM = (1UL << 1),
THREAD_FLAG_IDLE = (1UL << 2), //非工作状态
THREAD_FLAG_SLEP = (1UL << 3), //osThreadSuspend
THREAD_FLAG_STOP = (1UL << 4),
THREAD_FLAG_TEST = (1UL << 5),
THREAD_FLAG_MAX = (1UL << 6),
THREAD_FLAG_ALL = (THREAD_FLAG_MAX-1)
} ThreadModeBits;
typedef enum
{
PWR_NONE,
PWR_IDLE,
PWR_SLEEP,
}psStat_t;
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#define SUBSYS_APPHUB_TASK_STACK_SIZE (1024*5)
extern StaticTask_t subsys_apphub_task;
extern uint8_t subsys_apphub_task_stack[SUBSYS_APPHUB_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
#define SUBSYS_INPUT_TASK_STACK_SIZE (1024*1)
extern StaticTask_t subsys_input_task;
extern uint8_t subsysInputTaskStack[SUBSYS_INPUT_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#define SUBSYS_STATUS_TASK_STACK_SIZE (1024*5)
extern StaticTask_t subsysStatusTask;
extern uint8_t subsys_status_task_stack[SUBSYS_STATUS_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STORAGE_ENABLE
#define SUBSYS_STORAGE_TASK_STACK_SIZE (1024*6)
extern StaticTask_t subsys_storage_task;
extern uint8_t subsys_storage_task_stack[SUBSYS_STORAGE_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_MEDIA_ENABLE
// #define SUBSYS_MEDIA_TASK_STACK_SIZE (1024*1)
// extern StaticTask_t subsys_media_task;
// extern uint8_t subsys_media_task_stack[SUBSYS_MEDIA_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_LAUNCHER_ENABLE
#define SUBSYS_GUI_TASK_STACK_SIZE (1024*4)
extern StaticTask_t subsys_gui_task;
extern uint8_t subsys_gui_task_stack[SUBSYS_GUI_TASK_STACK_SIZE];
extern void guiInit(uint32_t mode);
extern void guiModeSet(ThreadModeBits mode);
#endif
#define SMS_BUFF_NUM (3U)
#define SMS_SIZE_MAX (2*164U)
typedef struct
{
int8_t index;
uint8_t length;
char user[25];
char date[25];
char number[25];
uint8_t text[SMS_SIZE_MAX];
} sms_data_t;
#ifdef __cplusplus
}
#endif
#endif /* MODE_CONFIG_H */

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@ -1,10 +0,0 @@
#include "storage.h"
#include "merged.h"
ext_bin_desc_t ext_bin_desc[] = {
{"lv_font_extern_36.bin", 0x00000000,859753,0x0020,0xFFE5,0},
{"lv_font_system_16.bin", 0x000D1E69,3364,0x0030,0x0000,0},
{"lv_font_system_66.bin", 0x000D2B8D,17860,0x0030,0x0000,0},
{"00_tts.bin", 0x000D7151, 567258,156,810,0},
};

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@ -1,27 +0,0 @@
#ifndef EXT_FILES_H
#define EXT_FILES_H
#include <stdint.h>
#define FEATURE_SUBSYS_EXT_FILES_ENABLE
#define LV_FONT_EXTERN_36 "X:/lv_font_extern_36.bin"
#define LV_FONT_SYSTEM_16 "X:/lv_font_system_16.bin"
#define LV_FONT_SYSTEM_66 "X:/lv_font_system_66.bin"
#define LV_IMAGE_00 "X:/00_tts.bin"
#define TOTAL_BIN_NUM 4
#define TOTAL_BIN_SIZE 1448235
typedef struct {
char path[40];
uint32_t addr;
uint32_t size;
uint16_t width;
uint16_t height;
uint32_t offset;
} ext_bin_desc_t;
extern ext_bin_desc_t ext_bin_desc[];
#endif // EXT_FILES_H

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@ -1,190 +0,0 @@
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#include "app.h"
#include "apphub.h"
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#include "status.h"
#endif
#ifdef FEATURE_SUBSYS_MODE_ENABLE
#include "mode.h"
#endif
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
#include "uartservice.h"
#endif
#ifdef FEATURE_SUBSYS_CMDPARSE_ENABLE
#include "cmdparse.h"
#endif
#ifdef FEATURE_SUBSYS_AUDIO_ENABLE
#include "audio.h"
#endif
#ifdef FEATURE_SUBSYS_SENSORHUB_ENABLE
#include "sensorhub.h"
#endif
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
#include "keypad.h"
#include "kpc.h"
extern const uint8_t keyCodes[ROWS][COLUMNS];
#endif
#include "cmsis_os2.h"
#include "slpman.h"
#include "pwrkey.h"
#include "ostask.h"
#include "osasys.h"
#include "bsp.h"
#include "bsp_custom.h"
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
#include "input.h"
#endif
#ifdef FEATURE_SUBSYS_SYSLOG_ENABLE
#include "syslog.h"
#endif
#define APP_TRACE(subId, argLen, format, ...) \
ECOMM_TRACE(UNILOG_REF_APP, subId, P_VALUE, argLen, format, ##__VA_ARGS__)
#define QUEUE_SIZE_KEY 50
#define KEY_PRESSED 0
#define KEY_PRESS_SHORT_TIME 10
#define KEY_PRESS_LONG_TIME 2000
#include "mode_config.h"
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
#include "kpc_defs.h"
#endif
static uint8_t number_input_flag = 0;
static uint8_t test_flag = 0;
typedef enum
{
KEY_PRESS_SHORT = 0,
KEY_PRESS_LONG = 1
} KeyPressT;
typedef enum
{
KEY_ACTION_VOLUME_PLUS_SHORT = 0,
KEY_ACTION_VOLUME_PLUS_LONG = 1,
KEY_ACTION_VOLUME_MINUS_SHORT = 2,
KEY_ACTION_VOLUME_MINUS_LONG = 3,
KEY_ACTION_MENU_SHORT = 4,
KEY_ACTION_MENU_LONG = 5,
KEY_ACTION_INVALID
} KeyActionT;
typedef struct
{
uint8_t pad;
uint32_t timeBegin;
uint32_t timeEnd;
} KeyActionDataT;
static osMessageQueueId_t gKeyQueue = NULL;
static KeyActionDataT gKeyActionData[WAKEUP_PAD_MAX] = {0};
void extInputProc()
{
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
keypadScan();
#endif
}
void cmdInputProc()
{
#ifdef FEATURE_SUBSYS_CMDPARSE_ENABLE
CmdParseResultT cmdParseResult = {0};
AppMsgT msg={0};
if (cmdParseResultGet(&cmdParseResult, 0) == osOK)
{
SYSLOG_INFO("name: %s, param1: %d, param2: %d, param3: %s\r\n",
cmdParseResult.name, cmdParseResult.param1, cmdParseResult.param2,
(cmdParseResult.param3 != NULL) ? cmdParseResult.param3 : "NULL");
if(strcmp(cmdParseResult.name,"@key") == 0)
{
if (cmdParseResult.param3 != NULL)
{
msg.msgType = APP_KEY_MSG;
msg.param1 = cmdParseResult.param3[0];
appSendMsg(&msg);
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
uartServiceSend(cmdParseResult.param3,10);
#endif
}
}
else if(strcmp(cmdParseResult.name,"@tp") ==0)
{
;
}
else if(strcmp(cmdParseResult.name,"@message") ==0)
{
;
}
else if (strcmp(cmdParseResult.name,"@mode") == 0)
{
#ifdef FEATURE_SUBSYS_MODE_ENABLE
modeSave(cmdParseResult.param1);
#endif
}else if(strcmp(cmdParseResult.name,"@dbgswi") == 0)
{
#ifdef FEATURE_SUBSYS_MODE_ENABLE
if(debugTypeGet() >= 3)
{
#ifdef FEATURE_SUBSYS_CONSOLE_ENABLE
SYSLOG_INFO("swi consoleTaskInit\r\n");
consoleTaskInit();
debugSet(DEBUG_CMD);
#endif
}
#endif
}
else
{
msg.msgType=APP_USER_MSG;
appSendMsg(&msg);
}
if (cmdParseResult.param3 != NULL)
{
free(cmdParseResult.param3);
cmdParseResult.param3 = NULL;
}
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
uartServiceSend("Success", 0);
#endif
}
#endif
}
void statsInputProc()
{
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
StatusT status = {0};
AppMsgT msg={0};
if (statusGet(&status, 0) == osOK)
{
msg.msgType = APP_STAT_MSG;
msg.param1 = ((int32_t *)(&status))[0];
msg.param2 = ((int32_t *)(&status))[1];
msg.param3 = (uint32_t *)(status.time);
appSendMsg(&msg);
}
#endif
}
void inputProcMount()
{
mountInputProc(extInputProc, 0);
mountInputProc(cmdInputProc, 1);
mountInputProc(statsInputProc, 2);
}

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@ -1,181 +0,0 @@
/****************************************************************************
*
* Copy right: 2024-, Copyrigths of EigenComm Ltd.
* File name: main.c
* Description: EC718P lcd_demo entry source file
* History: Rev1.0 2024-03-01
*
****************************************************************************/
#include <string.h>
#include "bsp.h"
#include "bsp_custom.h"
#include "os_common.h"
#include "ostask.h"
#include DEBUG_LOG_HEADER_FILE
#include "plat_config.h"
#include "slpman.h"
#include "mode_config.h"
#include "version.h"
#ifdef FEATURE_AT_ENABLE
#include "at_def.h"
#include "at_api.h"
#endif
#if defined(FEATURE_CTCC_DM_ENABLE) || defined(FEATURE_CUCC_DM_ENABLE) || defined(FEATURE_CMCC_DM_ENABLE)
#include "dm_task.h"
#endif
#ifdef FEATURE_APP_TLS_ENABLE
#include "at_ssl_task.h"
#endif
#ifdef FEATURE_PLAT_HTTP_AT_ENABLE
#include "at_http_task.h"
#endif
#ifdef FEATURE_CTWING_CERTI_ENABLE
#include "ctw_task.h"
#endif
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
#include "input.h"
StaticTask_t subsys_input_task;
uint8_t subsysInputTaskStack[SUBSYS_INPUT_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STORAGE_ENABLE
#include "storage.h"
StaticTask_t subsys_storage_task;
uint8_t subsys_storage_task_stack[SUBSYS_STORAGE_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#include "status.h"
StaticTask_t subsysStatusTask;
uint8_t subsys_status_task_stack[SUBSYS_STATUS_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
#include "uartservice.h"
#endif
#ifdef FEATURE_SUBSYS_CMDPARSE_ENABLE
#include "cmdparse.h"
#endif
#ifdef FEATURE_SUBSYS_MQTT_ONENET_ENABLE
#include "onenet_mqtt.h"
#endif
#ifdef FEATURE_SUBSYS_MISC_ENABLE
#include "misc.h"
#endif
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#include "app.h"
#include "apphub.h"
StaticTask_t subsys_apphub_task;
uint8_t subsys_apphub_task_stack[SUBSYS_APPHUB_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_MODE_ENABLE
#include "mode.h"
#endif
#ifdef FEATURE_SUBSYS_SYSLOG_ENABLE
#include "syslog.h"
#endif
void usb_portmon_task_init(void);
#ifdef FEATURE_SUBSYS_OPENHAL_ENABLE
#include "api_tp.h"
#include "api_scr.h"
#include "api_comm.h"
#endif
/**
* \fn sysInit
* \brief System initialization function
* \return void
*/
void sysInit(void)
{
// Power on the Always-On (AON) peripherals
slpManAONIOPowerOn();
// Set the voltage for the Always-On (AON) peripherals
slpManAONIOVoltSet(IOVOLT_3_30V);
// Set the voltage for the normal (non-AON) peripherals
slpManNormalIOVoltSet(IOVOLT_3_30V);
#ifdef FEATURE_SUBSYS_OPENHAL_ENABLE
deviceManagerInit();
#endif
// Initialize the UART service if the feature is enabled
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
uartServiceInit();
#endif
}
/**
\fn
\brief
\return
*/
void normalModeMenu(void)
{
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
subInputInit();
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
subStatusInit();
#endif
#ifdef FEATURE_SUBSYS_STORAGE_ENABLE
subStorageInit();
#endif
#ifdef FEATURE_SUBSYS_MQTT_ONENET_ENABLE
onenetMqttInit();
#endif
//screenInit();
extern void aliPayInit(void);
aliPayInit();
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
extern AppT mainApp;
subApphubInit();
mountApp(&mainApp, 0);
setActiveApp(0);
#endif
}
void testModeMenu(void)
{
}
static void appInit(void *arg)
{
ECPLAT_PRINTF(UNILOG_PLA_APP, EC_CHIP_VERSION_1, P_INFO, "%s", EC_CHIP_VERSION);
#if defined(FEATURE_CTCC_DM_ENABLE) || defined(FEATURE_CUCC_DM_ENABLE) || defined(FEATURE_CMCC_DM_ENABLE)
ecAutoRegisterInit();
#endif
#ifdef FEATURE_CTWING_CERTI_ENABLE
ecCtwAutoRegisterInit();
#endif
#ifdef FEATURE_APP_TLS_ENABLE
sslEngineInit();
#endif
#ifdef FEATURE_PLAT_HTTP_AT_ENABLE
httpEngineInit();
#endif
#if (RTE_USB_EN == 1)
if (BSP_UsbGetVBUSMode()==1)
{
usb_portmon_task_init() ;
}
#endif
sysInit();
#ifdef FEATURE_SUBSYS_MODE_ENABLE
modeSelect();
#endif
}
/**
\fn int main_entry(void)
\brief main entry function.
\return
*/
void main_entry(void)
{
BSP_CommonInit();
osKernelInitialize();
registerAppEntry(appInit, NULL);
if (osKernelGetState() == osKernelReady)
{
osKernelStart();
}
while(1);
}

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@ -1,125 +0,0 @@
#include <stdio.h>
#include <stdint.h>
#include <stdbool.h>
#include DEBUG_LOG_HEADER_FILE
#include <string.h>
#include "cmsis_os2.h"
#include "slpman.h"
#include "osasys.h"
#include "ps_lib_api.h"
#include "ps_sim_if.h"
#include "networkmgr.h"
#include "netdb.h"
#include "alipay_bind.h"
#include "vendor_os.h"
#include "alipay_net_kal.h"
#include "vendor_device_info.h"
#include "vendor_se_v2.h"
#include "hed_private.h"
#include "port_ec71x_i2c.h"
#include "cmsis_os2.h"
#define THREAD_STACK_SIZE_ALIPAY (20 * 1024)
static void threadAlipay(void *argument)
{
uint8_t com_outbuf[300] = {0};
uint32_t outlen = 0;
int ret = 0;
bool bindStatus = false;
NmAtiNetifInfo pNetInfo;
uint8_t pinState = CMI_SIM_PIN_STATE_UNKNOWN;
//step 1:check SIM card
do
{
ret = simGetPinStateSync(&pinState);
if(ret != CME_SUCC || pinState != CMI_SIM_PIN_STATE_READY)
{
osDelay(100);
continue;
}
//step 2:check network
ret = appGetNetInfoSync(1, &pNetInfo);
if((ret != CMS_RET_SUCC) || (pNetInfo.netStatus != NM_NETIF_ACTIVATED))
{
osDelay(100);
continue;
}
break;
}while(1);
//step 2:init se
csi_exit_lpm(0);
HED_IIC_Init();
#ifdef HED_I2C_SE0
//---- 1. 注册设备----
ret = api_register(PERIPHERAL_I2C, I2C_PERIPHERAL_SE0);
if (ret != SE_SUCCESS)
{
ECPLAT_PRINTF(UNILOG_PLAT_ALIPAY, HED_init_invalid_0, P_ERROR, "failed to i2c api_register");
goto EXIT;
}
//---- 2. 选择设备 ----
ret = api_select(PERIPHERAL_I2C, I2C_PERIPHERAL_SE0);
if (ret != SE_SUCCESS)
{
ECPLAT_PRINTF(UNILOG_PLAT_ALIPAY, HED_init_invalid_1, P_ERROR, "failed to i2c api_select");
goto EXIT;
}
#endif
ret = api_connect(com_outbuf, &outlen);
if (ret != SE_SUCCESS)
{
ECPLAT_PRINTF(UNILOG_PLAT_ALIPAY, HED_init_invalid_2, P_ERROR, "failed to i2c api_connect");
goto EXIT;
}
//ret = alipay_reset_all();
//alipay_log_ext("alipay_reset_all,ret=%d",ret);
ret = alipay_pre_init();
alipay_log_ext("alipay_pre_init,ret=%d",ret);
if(ret)
{
ECPLAT_PRINTF(UNILOG_PLAT_ALIPAY, alipay_pre_init_invalid, P_ERROR, "alipay_pre_init fail");
goto EXIT;
}
if(!alipay_get_binding_status())
{
char bindCode[256] = {0};
int bindCodeLen = sizeof(bindCode);
memset(bindCode,0x00,bindCodeLen);
alipay_get_binding_code(bindCode,&bindCodeLen);
ECPLAT_PRINTF(UNILOG_PLAT_ALIPAY, alipay_get_binding_code, P_DEBUG, "%s",bindCode);
}
while(1)
{
osDelay(100);
}
EXIT:
osThreadExit();
}
void alipay_binding_process_notify(int status)
{
}
void aliPayInit(void)
{
osThreadAttr_t threadAttr = {0};
memset(&threadAttr, 0, sizeof(threadAttr));
threadAttr.name = "threadAlipay";
threadAttr.stack_size = THREAD_STACK_SIZE_ALIPAY;
threadAttr.priority = osPriorityNormal;
if (osThreadNew(threadAlipay, NULL, &threadAttr) == NULL)
{
alipay_log_ext("create threadAlipay fail");
}
}

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@ -1,108 +0,0 @@
#include <string.h>
#include "FreeRTOS.h"
#include "ostask.h"
#include "cmsis_os2.h"
#include "charge.h"
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
#include "keypad.h"
#include "kpc.h"
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#include "status.h"
#endif
#ifdef FEATURE_SUBSYS_MODE_ENABLE
#include "mode.h"
#endif
#include "bsp_custom.h"
#include DEBUG_LOG_HEADER_FILE
#include "plat_config.h"
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#include "app.h"
#include "apphub.h"
#endif
#ifdef FEATURE_SUBSYS_SYSLOG_ENABLE
#include "syslog.h"
#endif
AppT mainApp;
#define APP_TRACE(subId, argLen, format, ...) \
ECOMM_TRACE(UNILOG_TEST, subId, P_VALUE, argLen, format, ##__VA_ARGS__)
AppInfoT mainAppInfo={0};
uint32_t* mainAppWnd={0};
/********************************** normal mode begin **********************************/
void normalMainInit(AppInfoT *appInfo)
{
appInfo->initStatus = 1;
#ifdef FEATURE_SUBSYS_SYSLOG_ENABLE
syslogSetLevel(SL_DEBUG);
syslogSetChannel(SC_UART1 | SC_USB);
#endif
}
int32_t normalAppPreDraw()
{
return 0;
}
int32_t normalAppAfterDraw()
{
return 0;
}
int32_t normalAppDestory()
{
return 0;
}
int32_t normalAppMsgProc(AppInfoT *appInfo,AppMsgT *msg, uint32_t reserved2, uint32_t syscallTable)
{
return 0;
}
/********************************** normal mode end **********************************/
/********************************** test mode begin **********************************/
void testMainInit(AppInfoT *appInfo)
{
}
int32_t testAppPreDraw()
{
return 0;
}
int32_t testAppAfterDraw()
{
return 0;
}
int32_t testAppDestory()
{
return 0;
}
int32_t testAppMsgProc(AppInfoT *appInfo,AppMsgT *msg)
{
return 0;
}
/********************************** test mode end **********************************/
int32_t mainAppInit(AppInfoT *appInfo, uint32_t reserved1, uint32_t reserved2, uint32_t syscallTable)
{
mainApp.preDraw = normalAppPreDraw;
mainApp.msgProc = normalAppMsgProc;
mainApp.afterDraw = normalAppAfterDraw;
mainApp.destory = normalAppDestory;
normalMainInit(appInfo);
return 0;
}
AppT mainApp =
{
.init = mainAppInit,
.info = &mainAppInfo
};

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@ -1,758 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_PSRAM_ENABLE = n
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
DRIVER_APM_ENABLE = y
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
BUILD_AT_QA = n
ifeq ($(BUILD_AT_QA), y)
BUILD_QA_TEST_AT_ENABLE = y
BUILD_QA_TEST_GPIO_ENABLE = y
BUILD_QA_TEST_CHRG_ENABLE = y
endif
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
ifneq ($(SUBSYS_MEDIA_STREAM_ENABLE),y)
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
else
THIRDPARTY_MBEDTLS_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
endif
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECIDLEP
BUILD_PLAT_MISC_ECIDLEP_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = n
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

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@ -1,768 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = n
DRIVER_PSRAM_ENABLE = y
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = n
BUILD_AT_DEBUG = n
BUILD_AT_REF = n
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = n
DRIVER_CODEC2601_ENABLE = y
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
ifneq ($(SUBSYS_MEDIA_STREAM_ENABLE),y)
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
else
THIRDPARTY_MBEDTLS_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
endif
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
ifeq ($(AUDIO_FIX_SRC_ENABLE), y)
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
else
BUILD_FIXED_AUDIO_SOURCE_ENABLE = n
endif
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECPRFINFO
BUILD_PLAT_MISC_ECPRFINFO_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBLOCKPLMNLIST
BUILD_PS_DEV_ECBLOCKPLMNLIST_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = y
else
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
endif
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
#AT+ECEHPLMNLIST
BUILD_PS_EMM_ECEHPLMNLIST_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = y
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = y
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = y
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = y
else
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
endif
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

View File

@ -1,786 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = n
DRIVER_PSRAM_ENABLE = n
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
DRIVER_APM_ENABLE = y
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_JPEGCOMP_ENABLE = n
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
BUILD_AT_QA = n
ifeq ($(BUILD_AT_QA), y)
BUILD_QA_TEST_AT_ENABLE = y
BUILD_QA_TEST_GPIO_ENABLE = y
BUILD_QA_TEST_CHRG_ENABLE = y
endif
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
#AT+ECPRFINFO
BUILD_PLAT_MISC_ECPRFINFO_ENABLE = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
#AT+ECPRFINFO
BUILD_PLAT_MISC_ECPRFINFO_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
ifneq ($(SUBSYS_MEDIA_STREAM_ENABLE),y)
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
else
THIRDPARTY_MBEDTLS_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
endif
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
ifeq ($(AUDIO_FIX_SRC_ENABLE), y)
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
else
BUILD_FIXED_AUDIO_SOURCE_ENABLE = n
endif
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = y
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = y
else
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
endif
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = y
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = y
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = y
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = y
else
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
endif
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

View File

@ -1,753 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = n
DRIVER_PSRAM_ENABLE = y
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
ifneq ($(SUBSYS_MEDIA_STREAM_ENABLE),y)
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
else
THIRDPARTY_MBEDTLS_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
endif
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECIDLEP
BUILD_PLAT_MISC_ECIDLEP_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBLOCKPLMNLIST
BUILD_PS_DEV_ECBLOCKPLMNLIST_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
#AT+ECEHPLMNLIST
BUILD_PS_EMM_ECEHPLMNLIST_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

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@ -1,758 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = n
DRIVER_PSRAM_ENABLE = n
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
DRIVER_APM_ENABLE = y
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
BUILD_AT_QA = n
ifeq ($(BUILD_AT_QA), y)
BUILD_QA_TEST_AT_ENABLE = y
BUILD_QA_TEST_GPIO_ENABLE = y
BUILD_QA_TEST_CHRG_ENABLE = y
endif
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
ifneq ($(SUBSYS_MEDIA_STREAM_ENABLE),y)
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
else
THIRDPARTY_MBEDTLS_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
endif
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECIDLEP
BUILD_PLAT_MISC_ECIDLEP_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = n
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

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@ -1,27 +0,0 @@
ifeq ($(CONFIG_PROJ_APP_SECURITY_BOOT), y)
BUILDDIR ?= $(TOP)/PLAT/out/$(TARGET)/$(PROJECT)
EC_SECURE_TOOL := $(TOP)/PLAT/tools/ECSecTools/ECSecTools.exe
EC_SECURE_TOOL_CFG ?= $(TOP)/PLAT/tools/ECSecTools/config_secure.ini
BIN_HEAD_NAME := $(BINNAME)_head
#$(BUILDDIR)/$(BIN_HEAD_NAME).bin: $(BUILDDIR)/$(BINNAME).bin
# $(EC_SECURE_TOOL) genimghd bootloader
#.PHONY: POST_SIGN_STEP
.PHONY: build
POST_SIGN_HEAD_FILE := $(BUILDDIR)/$(BIN_HEAD_NAME).bin
$(POST_SIGN_HEAD_FILE):$(BUILDDIR)/$(BINNAME).elf
$(EC_SECURE_TOOL) --cfgfile $(EC_SECURE_TOOL_CFG) genimghd system
build:$(POST_SIGN_HEAD_FILE)
endif

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@ -1,255 +0,0 @@
AVAILABLE_TARGETS = ec7xx_ref_1h00
TOOLCHAIN = GCC
BINNAME = ap_$(PROJECT)
TOP := ../../../../../../..
CFLAGS += -DFOTA_NVM
FLOAT_FLAG_ENABLE = y
SUBSYS_ENABLE = y
SUBSYS_SYSLOG_ENABLE = y
SUBSYS_SYSTIME_ENABLE = y
SUBSYS_STORAGE_ENABLE = y
SUBSYS_FLASHEX_ENABLE = y
ifeq ($(SUBSYS_FLASHEX_ENABLE)_$(LFS_EX_DEPEND),y_true)
CFLAGS += -DFLASH_X_ENABLE
endif
SUBSYS_LFSEX_ENABLE = y
SUBSYS_SDCARD_ENABLE = n
SUBSYS_FATFS_ENABLE = n
SUBSYS_OPENPLAYER_ENABLE = y
SUBSYS_MEDIA_ENABLE = y
ifeq ($(SUBSYS_MEDIA_ENABLE),y)
SUBSYS_AUDIO_DEMO_ENABLE = y
SUBSYS_AUDIO_ENABLE = y
SUBSYS_TTS_ENABLE = y
SUBSYS_CODEC_ENABLE = y
SUBSYS_MP3_ENABLE = y
SUBSYS_AMR_ENABLE = y
SUBSYS_WAV_ENABLE = y
SUBSYS_PCM_ENABLE = y
SUBSYS_AMR_RECORD_ENABLE = y
SUBSYS_OPENRECORD_ENABLE = y
SUBSYS_MEDIA_STREAM_ENABLE = y
endif
SUBSYS_STATUS_ENABLE = n
SUBSYS_APPHUB_ENABLE = y
SUBSYS_INPUT_ENABLE = y
SUBSYS_OPENHAL_ENABLE = y
SUBSYS_OPENSDK_ENABLE = n
SUBSYS_OPENDDK_ENABLE = n
SUBSYS_CONSOLE_ENABLE = y
ifeq ($(SUBSYS_CONSOLE_ENABLE),y)
SUBSYS_UARTSERVICE_ENABLE = y
SUBSYS_FINSH_ENABLE = y
endif
DRIVER_ADC_ENABLE = y
ifeq ($(DRIVER_ADC_ENABLE),y)
CFLAGS += -DFEATURE_DRIVER_ADC_ENABLE
endif
ifeq ($(EUTRAN_MODE), cat_mode)
EUTRAN_CAT_MODE = y
endif
#if need usb auto adapt support, set to y
#USBNET_AUTO_ADAPT_ENABLE=y
#enable below setting if OPENCPU_MODE is needed
ifeq ($(OPENCPU), true)
OPENCPU_MODE_ENABLE = y
endif
ifeq ($(GCF_ENABLE), true)
GCF_FEATURE_ENABLE = y
endif
ifeq ($(MID_ENABLE), true)
MID_FEATURE_ENABLE = y
endif
ifeq ($(IMS_ENABLE), true)
IMS_MODE_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_ENABLE), true)
IMS_SMSONLY_MODE_ENABLE = y
endif
ifeq ($(AUDIO_ENABLE), true)
AUDIO_MODE_ENABLE = y
endif
ifeq ($(AUDIO_FIX_ENABLE), true)
AUDIO_FIX_SRC_ENABLE = y
endif
ifeq ($(TYPE), ec716s)
ifeq ($(RAM_ENBALE), true)
MORE_RAM_ENABLE = y
endif
endif
ifeq ($(TYPE), ec718p)
#AT+ECDIEXY
BUILD_PLAT_PROD_ECDIEXY_ENABLE = y
endif
ifeq ($(ROM_ENABLE), true)
MORE_ROM_ENABLE = y
endif
ifeq ($(LESS_LOG), true)
LESS_LOG_ENABLE = y
endif
ifeq ($(TYPE), ec718pm)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
ifeq ($(TYPE), ec718um)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
ifeq ($(TYPE), ec718sm)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
ifeq ($(TYPE), ec718hm)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
#features will be customized to whatever customers want!
include $(TOP)/PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/GCC/FeatCustom_$(TYPE).inc
ifeq ($(EXCEPTION_FLASH_DUMP_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_EXCEPTION_FLASH_DUMP_ENABLE
endif
ifeq ($(MIDDLEWARE_AMR_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_AMR_CP_ENABLE
endif
ifeq ($(MIDDLEWARE_VEM_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_VEM_CP_ENABLE
endif
ifeq ($(IMS_ENABLE), true)
CFLAGS_DEFS += -DFEATURE_IMS_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_CC_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_SMS_ENABLE
ifneq ($(findstring $(TYPE), ec718p ec718u),)
CFLAGS_DEFS += -DFEATURE_IMS_USE_PSRAM_ENABLE
endif
CFLAGS_DEFS += -DFEATURE_IMS_EMC_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_UT_ENABLE
CFLAGS_DEFS += -fno-strict-aliasing
endif
ifeq ($(IMS_SMSONLY_ENABLE), true)
CFLAGS_DEFS += -DFEATURE_IMS_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_SMS_ENABLE
CFLAGS_DEFS += -fno-strict-aliasing
# NO FEATURE_IMS_CC_ENABLE
endif
ifeq ($(AUDIO_ENABLE), true)
ifeq ($(BUILD_SUPPORT_APP_PCM_MEM_POOL), y)
CFLAGS_DEFS += -DFEATURE_SUPPORT_APP_PCM_MEM_POOL
endif
CFLAGS_DEFS += -DFEATURE_AUDIO_ENABLE
endif
ifneq ($(findstring $(TYPE), ec716s ec716e),)
ifeq ($(RAM_ENBALE), true)
CFLAGS_DEFS += -DFEATURE_MORERAM_ENABLE
endif
endif
ifeq ($(ROM_ENABLE), true)
CFLAGS_DEFS += -DFEATURE_MOREROM_ENABLE
endif
ifeq ($(LESS_LOG), true)
CFLAGS_DEFS += -DFEATURE_LESSLOG_ENABLE
endif
ifeq ($(THIRDPARTY_CMCC_DM_ENABLE), y)
THIRDPARTY_CISONENET_ENABLE = y
THIRDPARTY_ERCOAP_ENABLE = y
endif
#ensure AT command to be consistent with protocol
#such as mqtt/...
ifeq ($(THIRDPARTY_MQTT_ENABLE), n)
BUILD_PLAT_MQTT_AT_ENABLE = n
endif
ifeq ($(THIRDPARTY_HTTPC_ENABLE), n)
BUILD_PLAT_HTTP_AT_ENABLE = n
endif
ifeq ($(THIRDPARTY_MBEDTLS_ENABLE), n)
BUILD_PLAT_SSL_AT_ENABLE = n
endif
ifeq ($(MIDDLEWARE_FOTAPAR_ENABLE), n)
BUILD_PLAT_FOTA_AT_ENABLE = n
BUILD_PLAT_ECOTA_AT_ENABLE = n
endif
CFLAGS_INC += -I ../inc \
-I ../lfs \
-I $(TOP)/FIRMWARE/SRC/CAT1/Common/Inc \
-I $(TOP)/PLAT/driver/chip/$(CHIP)/ap/src/usb
obj-y += PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/main.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/main_app.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/input_proc.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/lfs/merged.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/rawData.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/bsp_custom.o
#CONFIG_PROJ_APP_SECURITY_BOOT = y
include $(TOP)/PLAT/tools/scripts/Makefile.rules
#configure USBNET_AUTO_ADAPT_ENABLE in ".\device\target\board\%BOARD_NAME%\ap\%BOARD_NAME%_ap.mk"'
ifeq ($(USBNET_AUTO_ADAPT_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_USBNET_ATA_FOR_AP
CFLAGS_DEFS += -DFEATURE_FIX_REMOTE_WKUP_UNPAIRED_CASE
endif
#enable wdt
CFLAGS += -DWDT_FEATURE_ENABLE=1
CFLAGS += -DFEATURE_UART_HELP_DUMP_ENABLE
#Enable SIM hotswap feature with pad configration and jitter handle by required----don't remove it
#CFLAGS += -DSIM_HOT_SWAP_FEATURE
#Make all warnings into errors
# CFLAGS += -Werror
ifneq ($(OPENCPU_MODE_ENABLE),y)
ifneq ($(BUILD_AT),y)
$(error This example needs to modify "BUILD_AT" to "y" in device\target\board\$(TARGET)\$(CORE)\$(TARGET)_$(CORE).mk)
endif
endif

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@ -1,572 +0,0 @@
#ifndef __RTE_DEVICE_H
#define __RTE_DEVICE_H
#include "ec7xx.h"
/* Peripheral IO Mode Select, Must Configure First !!!
Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
*/
#define POLLING_MODE 0x1
#define DMA_MODE 0x2
#define IRQ_MODE 0x3
#define UNILOG_MODE 0x4
#define RTE_UART0_TX_IO_MODE UNILOG_MODE
#ifdef TYPE_EC718M
#define RTE_UART0_RX_IO_MODE IRQ_MODE // Use IRQ_MODE instead of DMA_MODE coz we'll have no chance to enter psram Hybd sleep
#else
#define RTE_UART0_RX_IO_MODE DMA_MODE
#define USART0_RX_TRIG_LVL (30)
#endif
#define RTE_UART1_TX_IO_MODE DMA_MODE
#define RTE_UART1_RX_IO_MODE DMA_MODE
#define RTE_UART2_TX_IO_MODE DMA_MODE
#define RTE_UART2_RX_IO_MODE DMA_MODE
#define RTE_UART3_TX_IO_MODE DMA_MODE
#define RTE_UART3_RX_IO_MODE DMA_MODE
#define RTE_SPI0_IO_MODE DMA_MODE
#define RTE_SPI1_IO_MODE POLLING_MODE
#define RTE_I2C0_IO_MODE POLLING_MODE
#define RTE_I2C1_IO_MODE POLLING_MODE
// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
#define RTE_I2C0 1
// { PAD_PIN30}, // 0 : gpio15 / 2: I2C0_SCL
// { PAD_PIN29}, // 0 : gpio14 / 2: I2C0_SDA
#define RTE_I2C0_SCL_BIT 30
#define RTE_I2C0_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C0_SDA_BIT 29
#define RTE_I2C0_SDA_FUNC PAD_MUX_ALT2
// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
#define RTE_I2C1 1
// { PAD_PIN20}, // 0 : gpio5 / 2 : I2C1 SCL
// { PAD_PIN19}, // 0 : gpio4 / 2 : I2C1 SDA
#define RTE_I2C1_SCL_BIT 20
#define RTE_I2C1_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C1_SDA_BIT 19
#define RTE_I2C1_SDA_FUNC PAD_MUX_ALT2
// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
// Configuration settings for Driver_USART0 in component ::Drivers:USART
#define RTE_UART0 1
#define RTE_UART0_CTS_PIN_EN 0
#define RTE_UART0_RTS_PIN_EN 0
#if defined CHIP_EC718
// { PAD_PIN42}, // 0 : gpio36 / 3 : UART0 RTSn
// { PAD_PIN43}, // 0 : gpio37 / 3 : UART0 CTSn
// { PAD_PIN31}, // 0 : gpio16 / 1 : UART0 RXD
// { PAD_PIN32}, // 0 : gpio17 / 1 : UART0 TXD
#define RTE_UART0_RTS_BIT 42
#define RTE_UART0_RTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_CTS_BIT 43
#define RTE_UART0_CTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_RX_BIT 31
#define RTE_UART0_RX_FUNC PAD_MUX_ALT1
#define RTE_UART0_TX_BIT 32
#define RTE_UART0_TX_FUNC PAD_MUX_ALT1
#elif defined CHIP_EC716
// { PAD_PIN14}, // 0 : gpio2 / 5 : UART0 RTSn
// { PAD_PIN15}, // 0 : gpio3 / 5 : UART0 CTSn
// { PAD_PIN18}, // 0 : gpio6 / 1 : UART0 RXD
// { PAD_PIN19}, // 0 : gpio7 / 1 : UART0 TXD
#define RTE_UART0_RTS_BIT 14
#define RTE_UART0_RTS_FUNC PAD_MUX_ALT5
#define RTE_UART0_CTS_BIT 15
#define RTE_UART0_CTS_FUNC PAD_MUX_ALT5
#define RTE_UART0_RX_BIT 18
#define RTE_UART0_RX_FUNC PAD_MUX_ALT1
#define RTE_UART0_TX_BIT 19
#define RTE_UART0_TX_FUNC PAD_MUX_ALT1
#endif
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_TX_REQID DMA_REQUEST_USART0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_RX_REQID DMA_REQUEST_USART0_RX
// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
// Configuration settings for Driver_USART1 in component ::Drivers:USART
#define RTE_UART1 1
#define RTE_UART1_CTS_PIN_EN 0
#define RTE_UART1_RTS_PIN_EN 0
#if defined CHIP_EC718
// { PAD_PIN27}, // 0 : gpio12 / 2 : UART1 RTS
// { PAD_PIN28}, // 0 : gpio13 / 2 : UART1 CTS
// { PAD_PIN33}, // 0 : gpio18 / 1 : UART1 RXD
// { PAD_PIN34}, // 0 : gpio19 / 1 : UART1 TXD
#define RTE_UART1_RTS_BIT 27
#define RTE_UART1_RTS_FUNC PAD_MUX_ALT2
#define RTE_UART1_CTS_BIT 28
#define RTE_UART1_CTS_FUNC PAD_MUX_ALT2
#define RTE_UART1_RX_BIT 33
#define RTE_UART1_RX_FUNC PAD_MUX_ALT1
#define RTE_UART1_TX_BIT 34
#define RTE_UART1_TX_FUNC PAD_MUX_ALT1
#elif defined CHIP_EC716
// { PAD_PIN16}, // 0 : gpio4 / 5 : UART1 RTS
// { PAD_PIN17}, // 0 : gpio5 / 5 : UART1 CTS
// { PAD_PIN20}, // 0 : gpio8 / 1 : UART1 RXD
// { PAD_PIN21}, // 0 : gpio9 / 1 : UART1 TXD
#define RTE_UART1_RTS_BIT 16
#define RTE_UART1_RTS_FUNC PAD_MUX_ALT5
#define RTE_UART1_CTS_BIT 17
#define RTE_UART1_CTS_FUNC PAD_MUX_ALT5
#define RTE_UART1_RX_BIT 20
#define RTE_UART1_RX_FUNC PAD_MUX_ALT1
#define RTE_UART1_TX_BIT 21
#define RTE_UART1_TX_FUNC PAD_MUX_ALT1
#endif
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_TX_REQID DMA_REQUEST_USART1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_RX_REQID DMA_REQUEST_USART1_RX
// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
// Configuration settings for Driver_USART2 in component ::Drivers:USART
#define RTE_UART2 1
// { PAD_PIN25}, // 0 : gpio10 / 3 : UART2 RXD
// { PAD_PIN26}, // 0 : gpio11 / 3 : UART2 TXD
#define RTE_UART2_RX_BIT 27
#define RTE_UART2_RX_FUNC PAD_MUX_ALT3
#define RTE_UART2_TX_BIT 28
#define RTE_UART2_TX_FUNC PAD_MUX_ALT3
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_TX_REQID DMA_REQUEST_USART2_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_RX_REQID DMA_REQUEST_USART2_RX
#define RTE_UART3 1
// { PAD_PIN29}, // 0 : gpio14 / 3 : UART3 RXD
// { PAD_PIN30}, // 0 : gpio15 / 3 : UART3 TXD
#define RTE_UART3_RX_BIT 29
#define RTE_UART3_RX_FUNC PAD_MUX_ALT3
#define RTE_UART3_TX_BIT 30
#define RTE_UART3_TX_FUNC PAD_MUX_ALT3
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART3_DMA_TX_REQID DMA_REQUEST_USART3_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART3_DMA_RX_REQID DMA_REQUEST_USART3_RX
// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
#define RTE_SPI0 1
// { PAD_PIN23}, // 0 : gpio8 / 1 : SPI0 SSn
// { PAD_PIN24}, // 0 : gpio9 / 1 : SPI0 MOSI
// { PAD_PIN25}, // 0 : gpio10 / 1 : SPI0 MISO
// { PAD_PIN26}, // 0 : gpio11 / 1 : SPI0 SCLK
#define RTE_SPI0_SSN_BIT 23
#define RTE_SPI0_SSN_FUNC PAD_MUX_ALT1
#define RTE_SPI0_MOSI_BIT 24
#define RTE_SPI0_MOSI_FUNC PAD_MUX_ALT1
#define RTE_SPI0_MISO_BIT 25
#define RTE_SPI0_MISO_FUNC PAD_MUX_ALT1
#define RTE_SPI0_SCLK_BIT 26
#define RTE_SPI0_SCLK_FUNC PAD_MUX_ALT1
#define RTE_SPI0_SSN_GPIO_INSTANCE 0
#define RTE_SPI0_SSN_GPIO_INDEX 8
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_TX_REQID DMA_REQUEST_SPI0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_RX_REQID DMA_REQUEST_SPI0_RX
// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
#define RTE_SPI1 0
// { PAD_PIN27}, // 0 : gpio12 / 1 : SPI1 SSn
// { PAD_PIN28}, // 0 : gpio13 / 1 : SPI1 MOSI
// { PAD_PIN29}, // 0 : gpio14 / 1 : SPI1 MISO
// { PAD_PIN30}, // 0 : gpio15 / 1 : SPI1 SCLK
// { PAD_PIN26}, // 0 : gpio11 / 2 : SPI1 SSn1
#define RTE_SPI1_SSN_BIT 27
#define RTE_SPI1_SSN_FUNC PAD_MUX_ALT1
#define RTE_SPI1_MOSI_BIT 28
#define RTE_SPI1_MOSI_FUNC PAD_MUX_ALT1
#define RTE_SPI1_MISO_BIT 29
#define RTE_SPI1_MISO_FUNC PAD_MUX_ALT1
#define RTE_SPI1_SCLK_BIT 30
#define RTE_SPI1_SCLK_FUNC PAD_MUX_ALT1
#define RTE_SPI1_SSN_GPIO_INSTANCE 0
#define RTE_SPI1_SSN_GPIO_INDEX 12
#define RTE_SPI1_SSN1_BIT 26
#define RTE_SPI1_SSN1_FUNC PAD_MUX_ALT2
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_TX_REQID DMA_REQUEST_SPI1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_RX_REQID DMA_REQUEST_SPI1_RX
// PWM0 Controller [Driver_PWM0]
// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
#define RTE_PWM 1
#define EFUSE_INIT_MODE POLLING_MODE
#define L2CTLS_INIT_MODE POLLING_MODE
#define FLASH_BARE_RW_MODE 1
// LSPI2 Configuration
#define RTE_LSPI2 1
#define RTE_LSPI2_IO_MODE POLLING_MODE
#define RTE_USP2_MCLK_PAD_ADDR 44 // DS: gpio38
#define RTE_USP2_MCLK_FUNC PAD_MUX_ALT2
#define RTE_USP2_BCLK_PAD_ADDR 40 // clock: gpio34
#define RTE_USP2_BCLK_FUNC PAD_MUX_ALT1
#define RTE_USP2_LRCK_PAD_ADDR 41 // cs: gpio35
#define RTE_USP2_LRCK_FUNC PAD_MUX_ALT1
#define RTE_USP2_DIN_PAD_ADDR 42 // miso: gpio36
#define RTE_USP2_DIN_FUNC PAD_MUX_ALT1
#define RTE_USP2_DOUT_PAD_ADDR 43 // mosi: gpio37
#define RTE_USP2_DOUT_FUNC PAD_MUX_ALT1
// DMA LSPI2 Request ID
#define RTE_LSPI2_DMA_RX_REQID DMA_REQUEST_USP2_TX
/////////////////////////// Camera Configuration Start////////////////////////////////////////////////////
// CSPI1 Configuration
#define RTE_CSPI1 1
#define RTE_CSPI1_MCLK_PAD_ADDR 18
#define RTE_CSPI1_MCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_PCLK_PAD_ADDR 19
#define RTE_CSPI1_PCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_CS_PAD_ADDR 20
#define RTE_CSPI1_CS_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_SDO0_PAD_ADDR 21
#define RTE_CSPI1_SDO0_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_SDO1_PAD_ADDR 22
#define RTE_CSPI1_SDO1_FUNC PAD_MUX_ALT1
// DMA CSPI1 Request ID
#define RTE_CSPI1_DMA_RX_REQID DMA_REQUEST_USP1_RX
// Choose camera version
#define CAMERA_ENABLE_SP0A39 0 ///< SP0A39 enable
#define SP0A39_2SDR 0 ///< SP0A39 2 wire
#define SP0A39_1SDR 0 ///< SP0A39 1 wire
#if (CAMERA_ENABLE_SP0A39 == 1)
#define CAM_CHAIN_COUNT CAM_30W
#endif
#define CAMERA_ENABLE_SP0821 0 ///< SP0821 enable
#define SP0821_2SDR 0 ///< SP0821 2 wire
#define SP0821_1SDR 0 ///< SP0821 1 wire
#if (CAMERA_ENABLE_SP0821 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
#define CAMERA_ENABLE_GC6123 0 ///< GC6123 enable
#define GC6123_2SDR 1 ///< GC6123 2 wire
#define GC6123_1SDR 0 ///< GC6123 1 wire
#if (CAMERA_ENABLE_GC6123 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
#define CAMERA_ENABLE_GC032A 1 ///< GC032A enable
#define GC032A_2SDR 0 ///< GC6123 2 wire
#define GC032A_1SDR 0 ///< GC6123 1 wire
#define GC032A_2DDR 1 ///< GC6123 1 wire
#if (CAMERA_ENABLE_GC032A == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR // use 8w to save decode's memory
#endif
#define CAMERA_ENABLE_BF30A2 0 ///< BF30A2 enable
#define BF30A2_1SDR 1 ///< BF30A2 1 wire
#if (CAMERA_ENABLE_BF30A2 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
#define CAMERA_ENABLE_GC6153 0 ///< GC6123 enable
#define GC6153_1SDR 1 ///< GC6123 1 wire
#if (CAMERA_ENABLE_GC6153 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
/*
static configuration for USB/UART relatded feature
RTE_USB_EN: whether init USB stack
RTE_ONE_UART_AT: enable one UART AT
RTE_ONE_UART_AT: enable two UART AT
RTE_ETHER_EN : whehter RNDIS/ECM feature is enabled
RTE_PPP_EN : whehter PPPOS feature is enabled
RTE_OPAQ_EN : whehter OPAQOS feature is enabled
*/
#if (defined OPEN_CPU_MODE)
/* device */
#define RTE_USB_EN 1
#define RTE_ONE_UART_AT 1
#define RTE_TWO_UART_AT 0
/* feature */
#define RTE_ETHER_EN 0
#define RTE_OPAQ_EN 0
#else
/* device */
#define RTE_USB_EN 1
#define RTE_ONE_UART_AT 1
#define RTE_TWO_UART_AT 0
/* feature */
#if (RTE_USB_EN == 1)
#define RTE_ETHER_EN 1 /* 0/1: to ctrl eth(rndis/ecm) independently! */
#ifdef FEATURE_USB_CCID_ENABLE
#define RTE_CCID_EN 1 /* 0/1: to ctrl ccid independently! */
#else
#define RTE_CCID_EN 0 /* 0/1: to ctrl ccid independently! */
#endif
#else
#define RTE_ETHER_EN RTE_USB_EN /* must be the same(disabled) */
#define RTE_CCID_EN RTE_USB_EN /* 0/1: to ctrl ccid independently! */
#endif
#define RTE_OPAQ_EN 0
#endif
#ifdef FEATURE_PPP_ENABLE
#define RTE_PPP_EN 1
#else
#define RTE_PPP_EN 0
#endif
/* to be compatible with old style */
#define RTE_RNDIS_EN RTE_ETHER_EN
#if (defined FEATURE_AUDIO_ENABLE)
#define RTE_AUDIO_EN 1
#define AUDIO_BOARD_NMA_SUPPORT 1
#else
#define RTE_AUDIO_EN 0
#endif
#if (RTE_ONE_UART_AT == 1)
#define RTE_UART0 1
#define RTE_UART1 1
#define RTE_UART2 1 //used by Sensor or BLE
#elif (RTE_TWO_UART_AT == 1)
#define RTE_UART0 1
#define RTE_UART1 1
#define RTE_UART2 1
#endif
/* to enable external thermal */
#define EXTERNAL_NTC_EXIST 0
#define RTE_LPUART_EN 1
#if (RTE_UART1 == 1)
#define UART1_DTR_PAD_INDEX 26 // GPIO11
#define UART1_DTR_GPIO_INSTANCE 0
#define UART1_DTR_GPIO_PIN 11
#define UART1_RI_PAD_INDEX 44 // AONIO 4 = GPIO24
#define UART1_RI_GPIO_INSTANCE 1
#define UART1_RI_GPIO_PIN 8
#define UART1_RI_PWM_INSTANCE 1
#define UART1_RI_PWM_CLK_ID FCLK_TIMER1
#define UART1_RI_PWM_CLK_SEL FCLK_TIMER1_SEL_26M
#define UART1_DCD_PAD_INDEX 45 // AONIO 5 = GPIO25
#define UART1_DCD_GPIO_INSTANCE 1
#define UART1_DCD_GPIO_PIN 9
#endif
#if (RTE_UART2 == 1)
#define UART2_DTR_PAD_INDEX 25 // GPIO10
#define UART2_DTR_GPIO_INSTANCE 0
#define UART2_DTR_GPIO_PIN 10
#define UART2_RI_PAD_INDEX 43 // AONIO 3 = GPIO23
#define UART2_RI_GPIO_INSTANCE 1
#define UART2_RI_GPIO_PIN 7
#define UART2_RI_PWM_INSTANCE 0
#define UART2_RI_PWM_CLK_ID FCLK_TIMER0
#define UART2_RI_PWM_CLK_SEL FCLK_TIMER0_SEL_26M
#define UART2_DCD_PAD_INDEX 47 // AONIO 7 = GPIO27
#define UART2_DCD_GPIO_INSTANCE 1
#define UART2_DCD_GPIO_PIN 11
#endif
#define NETLIGHT_PAD_INDEX 51 // AONIO 6 = GPIO26
#define NETLIGHT_PAD_ALT_FUNC PAD_MUX_ALT5
#define NETLIGHT_PWM_INSTANCE 3
//USIM1 OPTION1
#if defined CHIP_EC718
#define USIM1_URST_OP1_PAD_INDEX 19 // GPIO4
#define USIM1_URST_OP1_GPIO_INSTANCE 0
#define USIM1_URST_OP1_GPIO_PIN 4
#define USIM1_UCLK_OP1_PAD_INDEX 20 // GPIO5
#define USIM1_UCLK_OP1_GPIO_INSTANCE 0
#define USIM1_UCLK_OP1_GPIO_PIN 5
#define USIM1_UIO_OP1_PAD_INDEX 21 // GPIO6
#define USIM1_UIO_OP1_GPIO_INSTANCE 0
#define USIM1_UIO_OP1_GPIO_PIN 6
#elif defined CHIP_EC716
#define USIM1_URST_OP1_PAD_INDEX 13 // GPIO1
#define USIM1_URST_OP1_GPIO_INSTANCE 0
#define USIM1_URST_OP1_GPIO_PIN 1
#define USIM1_UCLK_OP1_PAD_INDEX 14 // GPIO2
#define USIM1_UCLK_OP1_GPIO_INSTANCE 0
#define USIM1_UCLK_OP1_GPIO_PIN 2
#define USIM1_UIO_OP1_PAD_INDEX 15 // GPIO3
#define USIM1_UIO_OP1_GPIO_INSTANCE 0
#define USIM1_UIO_OP1_GPIO_PIN 3
#endif
//USIM1 OPTION2
#define USIM1_UIO_OP2_PAD_INDEX 27 // GPIO12
#define USIM1_UIO_OP2_GPIO_INSTANCE 0
#define USIM1_UIO_OP2_GPIO_PIN 12
#define USIM1_URST_OP2_PAD_INDEX 28 // GPIO13
#define USIM1_URST_OP2_GPIO_INSTANCE 0
#define USIM1_URST_OP2_GPIO_PIN 13
#define USIM1_UCLK_OP2_PAD_INDEX 29 // GPIO14
#define USIM1_UCLK_OP2_GPIO_INSTANCE 0
#define USIM1_UCLK_OP2_GPIO_PIN 14
//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
#if defined CHIP_EC718
#define AONIO_6_PAD_INDEX 46 // AONIO 6 = GPIO26
#define AONIO_6_GPIO_INSTANCE 1
#define AONIO_6_GPIO_PIN 10
#elif defined CHIP_EC716
#define AONIO_6_PAD_INDEX 28 // AONIO 6 = GPIO16
#define AONIO_6_GPIO_INSTANCE 1
#define AONIO_6_GPIO_PIN 0 //GPIO16, (16 % 16)
#endif
#ifdef SIM_HOT_SWAP_FEATURE
#define TIMER_INSTANCE_4 4
#endif
//////////////////////////////////////////////////////////////////////////////////////////////
// I2S Setting field Start
// All the I2S's parameters that need user to set are all put here
//////////////////////////////////////////////////////////////////////////////////////////////
// I2S0 Configuration
#define RTE_I2S0 1
#define RTE_I2S0_MCLK_PAD_ADDR 39
#define RTE_I2S0_MCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S0_BCLK_PAD_ADDR 35
#define RTE_I2S0_BCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S0_LRCK_PAD_ADDR 36
#define RTE_I2S0_LRCK_FUNC PAD_MUX_ALT1
#define RTE_I2S0_DIN_PAD_ADDR 37
#define RTE_I2S0_DIN_FUNC PAD_MUX_ALT1
#define RTE_I2S0_DOUT_PAD_ADDR 38
#define RTE_I2S0_DOUT_FUNC PAD_MUX_ALT1
// I2S1 Configuration
#define RTE_I2S1 0
#define RTE_I2S1_IO_MODE DMA_MODE
#define RTE_I2S1_MCLK_PAD_ADDR 18
#define RTE_I2S1_MCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S1_BCLK_PAD_ADDR 19
#define RTE_I2S1_BCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S1_LRCK_PAD_ADDR 20
#define RTE_I2S1_LRCK_FUNC PAD_MUX_ALT1
#define RTE_I2S1_DIN_PAD_ADDR 21
#define RTE_I2S1_DIN_FUNC PAD_MUX_ALT1
#define RTE_I2S1_DOUT_PAD_ADDR 22
#define RTE_I2S1_DOUT_FUNC PAD_MUX_ALT1
//////////////////////////////////////////////////////////////////////////////////////////////
// I2S Setting field End
//////////////////////////////////////////////////////////////////////////////////////////////
#endif /* __RTE_DEVICE_H */

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#ifndef BSP_CUSTOM_H
#define BSP_CUSTOM_H
#ifdef __cplusplus
extern "C" {
#endif
#include "bsp.h"
/*
the following types define the scenarios of LdoFemVbat,
Scenario type1: LdoFemVbat does NOT reuse to RF FrontEnd (PA and switches) at all;
Scenario type2: LdoFemVbat is used for RF FrontEnd (PA or switches) at all, while also multiplexing other peripherals (such as cameras, vovice codecs, etc);
Scenario type3: LdoFemVbat is only used for RF FrontEnd (PA or switches) and is NOT reused for other peripherals (such as cameras, vovice codecs, etc);
The default setting is Scenario type3.
*/
enum
{
/*For this type1, the application needs to open or close LdoFemVbat on its own.
Please Note that LdoFemVbat will be turned off after entering sleep mode,
after exiting sleep, the application also needs to open LdoFemVbat and re-initialize the relevant peripherals under this power supply.
*/
LDOFEMVBAT_SCENARIO_TYPE1 = 0x0,
/*For this type2, the application needs to re-open LdoFemVbat before each use of peripherals under this power supply,
after use, LdoFemVbat can NOT be turned off (nor can it be turned off) because LdoFemVbat is also used for RF devices (PA or switches).
Meanwhile, due to the sleep mode, the logic implemented by the software will close LdoFemVbat before entering into sleep, and then open after exiting from sleep.
So, the application needs to re-open LdoFemVbat before use.
During the period when the application is using the peripheral, if need to keep LdoFemVbat in a powered state,
it can NOT enter any sleep mode.
*/
LDOFEMVBAT_SCENARIO_TYPE2,
/*For this type3, default mode, application does NOT use LdoFemVbat.*/
LDOFEMVBAT_SCENARIO_TYPE3
};
void BSP_CustomInit(void);
uint32_t BSP_UsbGetVBUSMode(void);
uint32_t BSP_UsbGetVBUSWkupPad(void);
void SimHotSwapInit(void);
#ifdef __cplusplus
}
#endif
#endif /* BSP_CUSTOM_H */

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/****************************************************************************
*
* Copy right: 2023-, Copyrigths of EigenComm Ltd.
* File name: mode.h
* Description: ec7xx mode config entry header file
* History: Rev1.0 2023-11-22
*
****************************************************************************/
#ifndef MODE_CONFIG_H
#define MODE_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
#include "FreeRTOS.h"
#include "ostask.h"
typedef enum Thread_Mode_bits {
THREAD_FLAG_INIT = (1UL << 0),
THREAD_FLAG_NORM = (1UL << 1),
THREAD_FLAG_IDLE = (1UL << 2), //非工作状态
THREAD_FLAG_SLEP = (1UL << 3), //osThreadSuspend
THREAD_FLAG_STOP = (1UL << 4),
THREAD_FLAG_TEST = (1UL << 5),
THREAD_FLAG_MAX = (1UL << 6),
THREAD_FLAG_ALL = (THREAD_FLAG_MAX-1)
} ThreadModeBits;
typedef enum
{
PWR_NONE,
PWR_IDLE,
PWR_SLEEP,
}psStat_t;
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#define SUBSYS_APPHUB_TASK_STACK_SIZE (1024*5)
extern StaticTask_t subsys_apphub_task;
extern uint8_t subsys_apphub_task_stack[SUBSYS_APPHUB_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
#define SUBSYS_INPUT_TASK_STACK_SIZE (1024*1)
extern StaticTask_t subsys_input_task;
extern uint8_t subsysInputTaskStack[SUBSYS_INPUT_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#define SUBSYS_STATUS_TASK_STACK_SIZE (1024*5)
extern StaticTask_t subsysStatusTask;
extern uint8_t subsys_status_task_stack[SUBSYS_STATUS_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STORAGE_ENABLE
#define SUBSYS_STORAGE_TASK_STACK_SIZE (1024*6)
extern StaticTask_t subsys_storage_task;
extern uint8_t subsys_storage_task_stack[SUBSYS_STORAGE_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_MEDIA_ENABLE
// #define SUBSYS_MEDIA_TASK_STACK_SIZE (1024*1)
// extern StaticTask_t subsys_media_task;
// extern uint8_t subsys_media_task_stack[SUBSYS_MEDIA_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_LAUNCHER_ENABLE
#define SUBSYS_GUI_TASK_STACK_SIZE (1024*4)
extern StaticTask_t subsys_gui_task;
extern uint8_t subsys_gui_task_stack[SUBSYS_GUI_TASK_STACK_SIZE];
#ifdef FEATURE_DRIVER_LCD_ENABLE
#include "lcdDrv.h"
#include "lcdComm.h"
extern lcdDrvFunc_t* lcdDev;
#endif
extern void guiInit(uint32_t mode);
extern void guiModeSet(ThreadModeBits mode);
#endif
#define SMS_BUFF_NUM (3U)
#define SMS_SIZE_MAX (2*164U)
typedef struct
{
int8_t index;
uint8_t length;
char user[25];
char date[25];
char number[25];
uint8_t text[SMS_SIZE_MAX];
} sms_data_t;
#ifdef __cplusplus
}
#endif
#endif /* MODE_CONFIG_H */

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@ -1,10 +0,0 @@
#include "storage.h"
#include "merged.h"
ext_bin_desc_t ext_bin_desc[] = {
{"lv_font_extern_36.bin", 0x00000000,859633,0x0020,0x9FA0,0},
{"lv_font_system_16.bin", 0x000D1DF1,3364,0x0030,0x0000,0},
{"lv_font_system_66.bin", 0x000D2B15,17860,0x0030,0x0000,0},
{"00_tts.bin", 0x000D70D9, 567258,156,810,0},
};

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@ -1,27 +0,0 @@
#ifndef EXT_FILES_H
#define EXT_FILES_H
#include <stdint.h>
#define FEATURE_SUBSYS_EXT_FILES_ENABLE
#define LV_FONT_EXTERN_36 "X:/lv_font_extern_36.bin"
#define LV_FONT_SYSTEM_16 "X:/lv_font_system_16.bin"
#define LV_FONT_SYSTEM_66 "X:/lv_font_system_66.bin"
#define LV_IMAGE_00 "X:/00_tts.bin"
#define TOTAL_BIN_NUM 4
#define TOTAL_BIN_SIZE 1448115
typedef struct {
char path[40];
uint32_t addr;
uint32_t size;
uint16_t width;
uint16_t height;
uint32_t offset;
} ext_bin_desc_t;
extern ext_bin_desc_t ext_bin_desc[];
#endif // EXT_FILES_H

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@ -1,196 +0,0 @@
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#include "app.h"
#include "apphub.h"
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#include "status.h"
#endif
#ifdef FEATURE_SUBSYS_MODE_ENABLE
#include "mode.h"
#endif
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
#include "uartservice.h"
#endif
#ifdef FEATURE_SUBSYS_CMDPARSE_ENABLE
#include "cmdparse.h"
#endif
#ifdef FEATURE_SUBSYS_AUDIO_ENABLE
#include "audio.h"
#endif
#ifdef FEATURE_SUBSYS_SENSORHUB_ENABLE
#include "sensorhub.h"
#endif
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
#include "keypad.h"
#include "kpc.h"
extern const uint8_t keyCodes[ROWS][COLUMNS];
#endif
#include "cmsis_os2.h"
#include "slpman.h"
#include "pwrkey.h"
#include "ostask.h"
#include "osasys.h"
#include "bsp.h"
#include "bsp_custom.h"
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
#include "input.h"
#endif
#ifdef FEATURE_SUBSYS_SYSLOG_ENABLE
#include "syslog.h"
#endif
#define APP_TRACE(subId, argLen, format, ...) \
ECOMM_TRACE(UNILOG_REF_APP, subId, P_VALUE, argLen, format, ##__VA_ARGS__)
#define QUEUE_SIZE_KEY 50
#define KEY_PRESSED 0
#define KEY_PRESS_SHORT_TIME 10
#define KEY_PRESS_LONG_TIME 2000
#include "mode_config.h"
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
#include "kpc_defs.h"
#endif
static uint8_t number_input_flag = 0;
static uint8_t test_flag = 0;
typedef enum
{
KEY_PRESS_SHORT = 0,
KEY_PRESS_LONG = 1
} KeyPressT;
typedef enum
{
KEY_ACTION_VOLUME_PLUS_SHORT = 0,
KEY_ACTION_VOLUME_PLUS_LONG = 1,
KEY_ACTION_VOLUME_MINUS_SHORT = 2,
KEY_ACTION_VOLUME_MINUS_LONG = 3,
KEY_ACTION_MENU_SHORT = 4,
KEY_ACTION_MENU_LONG = 5,
KEY_ACTION_INVALID
} KeyActionT;
typedef struct
{
uint8_t pad;
uint32_t timeBegin;
uint32_t timeEnd;
} KeyActionDataT;
static osMessageQueueId_t gKeyQueue = NULL;
static KeyActionDataT gKeyActionData[WAKEUP_PAD_MAX] = {0};
void extInputProc()
{
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
keypadScan();
#endif
}
void cmdInputProc()
{
#ifdef FEATURE_SUBSYS_CMDPARSE_ENABLE
CmdParseResultT cmdParseResult = {0};
AppMsgT msg={0};
if (cmdParseResultGet(&cmdParseResult, 0) == osOK)
{
SYSLOG_INFO("name: %s, param1: %d, param2: %d, param3: %s\r\n",
cmdParseResult.name, cmdParseResult.param1, cmdParseResult.param2,
(cmdParseResult.param3 != NULL) ? cmdParseResult.param3 : "NULL");
if(strcmp(cmdParseResult.name,"@key") == 0)
{
if (cmdParseResult.param3 != NULL)
{
msg.msgType = APP_KEY_MSG;
msg.param1 = cmdParseResult.param3[0];
appSendMsg(&msg);
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
uartServiceSend(cmdParseResult.param3,10);
#endif
}
}
else if(strcmp(cmdParseResult.name,"@tp") ==0)
{
;
}
else if(strcmp(cmdParseResult.name,"@message") ==0)
{
;
}
else if (strcmp(cmdParseResult.name,"@mode") == 0)
{
#ifdef FEATURE_SUBSYS_MODE_ENABLE
modeSave(cmdParseResult.param1);
#endif
}else if(strcmp(cmdParseResult.name,"@dbgswi") == 0)
{
#ifdef FEATURE_SUBSYS_MODE_ENABLE
if(debugTypeGet() >= 3)
{
#ifdef FEATURE_SUBSYS_CONSOLE_ENABLE
SYSLOG_INFO("swi consoleTaskInit\r\n");
consoleTaskInit();
debugSet(DEBUG_CMD);
#endif
}
#endif
}
else
{
msg.msgType=APP_USER_MSG;
appSendMsg(&msg);
}
if (cmdParseResult.param3 != NULL)
{
free(cmdParseResult.param3);
cmdParseResult.param3 = NULL;
}
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
uartServiceSend("Success", 0);
#endif
}
#endif
}
void statsInputProc()
{
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
StatusT status = {0};
AppMsgT msg={0};
if (statusGet(&status, 0) == osOK)
{
msg.msgType = APP_STAT_MSG;
msg.param1 = ((int32_t *)(&status))[0];
msg.param2 = ((int32_t *)(&status))[1];
msg.param3 = (uint32_t *)(status.time);
appSendMsg(&msg);
}
#endif
}
void powerKeyHandle(pwrKeyPressStatus status)
{
}
void inputProcMount()
{
mountInputProc(extInputProc, 0);
mountInputProc(cmdInputProc, 1);
mountInputProc(statsInputProc, 2);
}

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@ -1,154 +0,0 @@
/****************************************************************************
*
* Copy right: 2023-, Copyrigths of EigenComm Ltd.
* File name: main.c
* Description: EC718P ref_app min entry source file
* History: Rev1.0 2023-11-16
*
****************************************************************************/
#include <string.h>
#include "bsp.h"
#include "bsp_custom.h"
#include "os_common.h"
#include "ostask.h"
#include DEBUG_LOG_HEADER_FILE
#include "plat_config.h"
#include "slpman.h"
#include "mode_config.h"
#include "version.h"
#ifdef FEATURE_AT_ENABLE
#include "at_def.h"
#include "at_api.h"
#endif
#if defined(FEATURE_CTCC_DM_ENABLE) || defined(FEATURE_CUCC_DM_ENABLE) || defined(FEATURE_CMCC_DM_ENABLE)
#include "dm_task.h"
#endif
#ifdef FEATURE_APP_TLS_ENABLE
#include "at_ssl_task.h"
#endif
#ifdef FEATURE_PLAT_HTTP_AT_ENABLE
#include "at_http_task.h"
#endif
#ifdef FEATURE_CTWING_CERTI_ENABLE
#include "ctw_task.h"
#endif
#include "codecCtl.h"
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
#include "input.h"
StaticTask_t subsys_input_task;
uint8_t subsysInputTaskStack[SUBSYS_INPUT_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STORAGE_ENABLE
#include "storage.h"
StaticTask_t subsys_storage_task;
uint8_t subsys_storage_task_stack[SUBSYS_STORAGE_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#include "status.h"
StaticTask_t subsysStatusTask;
uint8_t subsys_status_task_stack[SUBSYS_STATUS_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
#include "uartservice.h"
#endif
#ifdef FEATURE_SUBSYS_CMDPARSE_ENABLE
#include "cmdparse.h"
#endif
#ifdef FEATURE_SUBSYS_MISC_ENABLE
#include "misc.h"
#endif
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#include "app.h"
#include "apphub.h"
StaticTask_t subsys_apphub_task;
uint8_t subsys_apphub_task_stack[SUBSYS_APPHUB_TASK_STACK_SIZE];
#endif
void usb_portmon_task_init(void);
void sysInit(void)
{
slpManAONIOPowerOn();
slpManAONIOVoltSet(IOVOLT_3_30V);
slpManNormalIOVoltSet(IOVOLT_3_30V);
#if (defined(PSRAM_FEATURE_ENABLE) && (PSRAM_EXIST == 1) && (!(defined(TYPE_EC718M))))
PSRAM_dmaAccessClkCtrl(true);
#endif
codecCtlInit();
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
uartServiceInit();
#endif
}
void appInit(void *arg)
{
ECPLAT_PRINTF(UNILOG_PLA_APP, EC_CHIP_VERSION_1, P_INFO, "%s", EC_CHIP_VERSION);
#if defined(FEATURE_CTCC_DM_ENABLE) || defined(FEATURE_CUCC_DM_ENABLE) || defined(FEATURE_CMCC_DM_ENABLE)
ecAutoRegisterInit();
#endif
#ifdef FEATURE_CTWING_CERTI_ENABLE
ecCtwAutoRegisterInit();
#endif
#ifdef FEATURE_APP_TLS_ENABLE
sslEngineInit();
#endif
#ifdef FEATURE_PLAT_HTTP_AT_ENABLE
httpEngineInit();
#endif
#if (RTE_USB_EN == 1)
if (BSP_UsbGetVBUSMode()==1)
{
usb_portmon_task_init() ;
}
#endif
#ifdef FEATURE_PLAT_MISC_ECIDLEP_ENABLE
extern void apPrintIdlePercent(void);
apPrintIdlePercent();
#endif
sysInit();
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
subInputInit();
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
subStatusInit();
#endif
#ifdef FEATURE_SUBSYS_CONSOLE_ENABLE
consoleTaskInit();
#endif
#ifdef FEATURE_SUBSYS_STORAGE_ENABLE
subStorageInit();
#endif
#ifdef FEATURE_SUBSYS_MEDIA_ENABLE
subMediaInit();
#endif
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
extern AppT mainApp;
subApphubInit();
mountApp(&mainApp, 0);
setActiveApp(0);
#endif
}
/**
\fn int main_entry(void)
\brief main entry function.
\return
*/
void main_entry(void)
{
BSP_CommonInit();
osKernelInitialize();
registerAppEntry(appInit, NULL);
if (osKernelGetState() == osKernelReady)
{
osKernelStart();
}
while(1);
}

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@ -1,96 +0,0 @@
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#include <string.h>
#include "FreeRTOS.h"
#include "ostask.h"
#include "cmsis_os2.h"
#include "charge.h"
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
#include "keypad.h"
#include "kpc.h"
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#include "status.h"
#endif
#ifdef FEATURE_SUBSYS_MODE_ENABLE
#include "mode.h"
#endif
#include "bsp_custom.h"
#include DEBUG_LOG_HEADER_FILE
#include "plat_config.h"
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#include "app.h"
#include "apphub.h"
#endif
#ifdef FEATURE_SUBSYS_SYSLOG_ENABLE
#include "syslog.h"
#endif
AppT mainApp;
#define APP_TRACE(subId, argLen, format, ...) \
ECOMM_TRACE(UNILOG_TEST, subId, P_VALUE, argLen, format, ##__VA_ARGS__)
AppInfoT mainAppInfo={0};
uint32_t* mainAppWnd={0};
/********************************** normal mode begin **********************************/
void normalMainInit(AppInfoT *appInfo)
{
appInfo->initStatus = 1;
#ifdef FEATURE_SUBSYS_SYSLOG_ENABLE
syslogSetLevel(SL_DEBUG);
syslogSetChannel(SC_UART1 | SC_USB);
#endif
}
int32_t normalAppPreDraw()
{
return 0;
}
int32_t normalAppAfterDraw()
{
return 0;
}
int32_t normalAppDestory()
{
return 0;
}
int32_t normalAppMsgProc(AppInfoT *appInfo,AppMsgT *msg, uint32_t reserved2, uint32_t syscallTable)
{
switch(msg->msgType)
{
case APP_STAT_MSG:
break;
default:
break;
}
return 0;
}
/********************************** normal mode end **********************************/
/********************************** test mode end **********************************/
int32_t mainAppInit(AppInfoT *appInfo, uint32_t reserved1, uint32_t reserved2, uint32_t syscallTable)
{
mainApp.preDraw = normalAppPreDraw;
mainApp.msgProc = normalAppMsgProc;
mainApp.afterDraw = normalAppAfterDraw;
mainApp.destory = normalAppDestory;
normalMainInit(appInfo);
return 0;
}
AppT mainApp =
{
.init = mainAppInit,
.info = &mainAppInfo
};
#endif

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@ -1,37 +0,0 @@
ifeq ($(CONFIG_PROJ_APP_SECURITY_BOOT), y)
CONFIG_PROJ_BL_SECURITY_BOOT = y
endif
ifeq ($(CONFIG_PROJ_BL_SECURITY_BOOT), y)
.PHONY: build
BUILDDIR ?= $(TOP)/PLAT/out/$(TARGET)/ap/$(PROJECT)
EC_SECURE_TOOL := $(TOP)/PLAT/tools/ECSecTools/ECSecTools.exe
EC_SECURE_TOOL_CFG ?= $(TOP)/PLAT/tools/ECSecTools/config_secure.ini
BIN_HEAD_NAME := $(BINNAME)_head
POST_SIGN_HEAD_FILE := $(BUILDDIR)/$(BIN_HEAD_NAME).bin
$(POST_SIGN_HEAD_FILE):$(BUILDDIR)/$(BINNAME).axf
$(EC_SECURE_TOOL) --cfgfile $(EC_SECURE_TOOL_CFG) genimghd bootloader
build:$(POST_SIGN_HEAD_FILE)
endif
ifeq ($(CONFIG_PROJ_APP_SECURITY_BOOT), y)
SYSTEM_VERIFY_KEY_FILE_SRC := $(BUILDDIR)/PLAT/project/$(TARGET)/ap/apps/$(PROJECT)/VerifyKeyFile.c
SYSTEM_VERIFY_KEY_FILE_DIR := $(dir $(SYSTEM_VERIFY_KEY_FILE_SRC))
$(SYSTEM_VERIFY_KEY_FILE_SRC):
mkdir -p $(SYSTEM_VERIFY_KEY_FILE_DIR)
$(EC_SECURE_TOOL) --cfgfile $(EC_SECURE_TOOL_CFG) genkeycsrc --output $@
SYSTEM_VERIFY_KEY_FILE_OBJ := $(SYSTEM_VERIFY_KEY_FILE_SRC:.c=.o)
endif

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@ -1,94 +0,0 @@
AVAILABLE_TARGETS = ec718_0h00
TOOLCHAIN = ARMCC
BINNAME = ap_bootloader
TOP := ../../../../../../..
FPGA_DEBUG = n
BUILD_EC_MW = n
BUILD_PS = n
BUILD_FW = n
BUILD_OS = n
BUILD_AT = n
BUILD_AT_DEBUG = n
DRIVER_PMU_ENABLE = n
DRIVER_FLASHRT_ENABLE = n
BUILD_OSA = n
DRIVER_ECMAIN_ENABLE = n
DRIVER_UTFC_ENABLE = n
#DRIVER_GPR_ENABLE = y
DRIVER_ULDP_ENABLE = n
DRIVER_USB_ENABLE = n
DRIVER_USBSMIMG_ENABLE = y
THIRDPARTY_MQTT_ENABLE = n
THIRDPARTY_CISONENET_ENABLE = n
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_LITTEFS_ENABLE = n
THIRDPARTY_RTT_ENABLE = n
THIRDPARTY_LWIP_ENABLE = n
THIRDPARTY_PING_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = n
THIRDPARTY_DHCPD_ENABLE = n
DRIVER_SPI_ENABLE = n
DRIVER_I2C_ENABLE = n
DRIVER_PMU_ENABLE = n
DRIVER_FLASHRT_ENABLE = n
DRIVER_TIMER_ENABLE = n
DRIVER_LPUART_ENABLE = n
DRIVER_UNILOG_ENABLE = n
DRIVER_CIPHER_ENABLE = y
DRIVER_SCT_ENABLE = n
DRIVER_SLCNT_ENABLE = n
DRIVER_MCUMODE_ENABLE = n
DRIVER_ADC_ENABLE = n
DRIVER_HAL_UART_ENABLE = n
DRIVER_PWRKEY_ENABLE = n
DRIVER_CHARGE_ENABLE = n
DRIVER_CAMERA_ENABLE = n
DRIVER_IPC_ENABLE = n
DRIVER_RESET_ENABLE = n
DRIVER_EXCP_ENABLE = n
DRIVER_CPADC_ENABLE = n
DRIVER_RFCALI_ENABLE = n
DRIVER_PHYHAL_ENABLE = n
MIDDLEWARE_DEBUG_TRACE_ENABLE = n
MIDDLEWARE_CMS_ENABLE = n
MIDDLEWARE_SIMBIP_ENABLE = n
MIDDLEWARE_NVRAM_ENABLE = n
MIDDLEWARE_RUNNV_ENABLE = n
MIDDLEWARE_CCIO_ENABLE = n
THIRDPARTY_QUIRC_ENABLE = n
THIRDPARTY_ZBAR_ENABLE = n
THIRDPARTY_MINILZO_ENABLE = n
CFLAGS_INC += -I ../inc \
-I $(TOP)/FIRMWARE/SRC/CAT1/Common/Inc
#CONFIG_PROJ_BL_SECURITY_BOOT = y
#CONFIG_PROJ_APP_SECURITY_BOOT = y
include $(TOP)/PLAT/driver/chip/ec718/ap/Makefile.inc
include $(TOP)/PLAT/project/$(TARGET)/ap/apps/$(PROJECT)/code/Makefile.inc
include $(TOP)/PLAT/project/$(TARGET)/ap/apps/$(PROJECT)/armcc/MakeProj.rules
include $(TOP)/PLAT/tools/scripts/Makefile.rules
#enable wdt
CFLAGS += -DWDT_FEATURE_ENABLE=1
CFLAGS += -DUSB_DRV_SMALL_IMAGE=1
CFLAGS += -DFEATURE_BOOTLOADER_PROJECT_ENABLE
ifeq ($(CONFIG_PROJ_APP_SECURITY_BOOT), y)
CFLAGS += -DCONFIG_PROJ_APP_SECURITY_BOOT
endif

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@ -1,18 +0,0 @@
#ifndef BL_LINK_MEM_MAP_H
#define BL_LINK_MEM_MAP_H
//included in bootloader ec718_0h00_flash.sct for link only
#define AP_FLASH_XIP_ADDR 0x00800000
#define BOOTLOADER_FLASH_LOAD_ADDR (AP_FLASH_XIP_ADDR+0x3000)
#define BOOTLOADER_FLASH_LOAD_SIZE 0x20000//128KB
#define XP_DBGRESERVED_BASE_ADDR (0x0053EF00)
//plat config addr and size
#define FLASH_MEM_PLAT_INFO_ADDR (AP_FLASH_XIP_ADDR+0x3fc000)
#define FLASH_MEM_PLAT_INFO_SIZE (0x4000)//16KB
#define FLASH_MEM_PLAT_INFO_NONXIP_ADDR (FLASH_MEM_PLAT_INFO_ADDR - AP_FLASH_XIP_ADDR)
#endif

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@ -1,34 +0,0 @@
#! armcc -E
LR_IROM1 0x00804000 0x12000 { ; load region size_region
UNLOAD_IROM 0x00804000 0x12000 { ; load address = execution address
*.o (RESET, +First)
.ANY (+RO)
}
AP_IRAM_XIP_START 0x00108000 ALIGN 32 { ; RW data
* (.XIPStartRamCode)
}
LOAD_IRAM_PRE1 0x00002000 0x000100 { ; code in ram
*(.platBootRamcodeFCLK)
}
LOAD_IRAM_PRE2 0x00003000 0x000c00 { ; code in ram
*(.pre2RamCode)
*(.platPARamcode)
qspi.o (+RO)
}
LOAD_IRAM 0x00004000 0x003000 { ; code in ram
flash.o (+RO)
}
LOAD_DRAM_SHARED 0x00007000 0x006000 { ; RW data
.ANY (+RW +ZI)
}
LOAD_DRAM_FOTA 0x000d000 EMPTY 0x002000 { ; RW data
}
}

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@ -1,33 +0,0 @@
#! armcc -E
LR_IROM1 0x00804000 0x12000 { ; load region size_region
UNLOAD_IROM 0x00804000 0x12000 { ; load address = execution address
*.o (RESET, +First)
.ANY (+RO)
}
AP_IRAM_XIP_START 0x00108000 ALIGN 32 { ; RW data
* (.XIPStartRamCode)
}
LOAD_IRAM_PRE1 0x00002000 0x000100 { ; code in ram
*(.platPMRamcodeFCLK)
}
LOAD_IRAM_PRE2 0x00003000 0x000c00 { ; code in ram
*(.platPARamcode)
qspi.o (+RO)
}
LOAD_IRAM 0x00004000 0x003000 { ; code in ram
flash.o (+RO)
}
LOAD_DRAM_SHARED 0x00007000 0x006000 { ; RW data
.ANY (+RW +ZI)
}
LOAD_DRAM_FOTA 0x000d000 EMPTY 0x002000 { ; RW data
}
}

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@ -1,196 +0,0 @@
#include <string.h>
#include "ec7xx.h"
typedef unsigned long UINT32;
typedef unsigned short UINT16;
typedef unsigned char UINT8;
__asm void __fast_memset(UINT32 *dst, UINT32 value, UINT32 length)
{
push {r4-r9}
cmp r2, #0
beq memset_return
mov r4, r1
mov r5, r1
mov r6, r1
mov r7, r1
and r8, r2,#0xf
mov r9, r8
cmp r8, #0
beq clr_16Byte
clr_4Byte
stmia r0!,{r4}
subs r8,r8,#4
cmp r8,#0
bne clr_4Byte
sub r2,r2,r9
clr_16Byte
stmia r0!,{r4,r5,r6,r7}
subs r2,r2,#16
cmp r2,#0
bne clr_16Byte
memset_return
pop {r4-r9}
bx lr
}
#if defined(__CC_ARM)
extern UINT32 Load$$AP_IRAM_XIP_START$$Base ;
extern UINT32 Image$$AP_IRAM_XIP_START$$Base ;
extern UINT32 Image$$AP_IRAM_XIP_START$$Length ;
extern UINT32 Load$$LOAD_IRAM_PRE1$$Base ;
extern UINT32 Image$$LOAD_IRAM_PRE1$$Base ;
extern UINT32 Image$$LOAD_IRAM_PRE1$$Length ;
extern UINT32 Load$$LOAD_IRAM_PRE2$$Base ;
extern UINT32 Image$$LOAD_IRAM_PRE2$$Base ;
extern UINT32 Image$$LOAD_IRAM_PRE2$$Length ;
extern UINT32 Load$$LOAD_IRAM$$Base ;
extern UINT32 Image$$LOAD_IRAM$$Base ;
extern UINT32 Image$$LOAD_IRAM$$Length ;
extern UINT32 Load$$LOAD_DRAM_SHARED$$Base ;
extern UINT32 Image$$LOAD_DRAM_SHARED$$Base ;
extern UINT32 Image$$LOAD_DRAM_SHARED$$Length ;
extern UINT32 Image$$LOAD_DRAM_SHARED$$ZI$$Base;
extern UINT32 Image$$LOAD_DRAM_SHARED$$ZI$$Limit;
extern UINT32 Stack_Size;
#endif
void SetZIDataToZero(void)
{
#if defined(__CC_ARM)
UINT32 *start_addr;
UINT32 *end_addr ;
UINT32 length;
UINT32* stack_len = &(Stack_Size);
start_addr = &(Image$$LOAD_DRAM_SHARED$$ZI$$Base) ;
end_addr = &(Image$$LOAD_DRAM_SHARED$$ZI$$Limit);
length = (UINT32)end_addr - (UINT32)start_addr;
__fast_memset((UINT32 *)start_addr, 0, length-(UINT32)stack_len);
#endif
}
void CopyXipStartRwToImage(void)
{
UINT32 *src;
UINT32 *dst;
UINT32 length;
dst = &(Image$$AP_IRAM_XIP_START$$Base);
src = &(Load$$AP_IRAM_XIP_START$$Base);
length = (unsigned int)&(Image$$AP_IRAM_XIP_START$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
}
void CopyPre1RamtoImage(void)
{
UINT32 *src;
UINT32 *dst;
UINT32 length;
#if defined(__CC_ARM)
dst = &(Image$$LOAD_IRAM_PRE1$$Base);
src = &(Load$$LOAD_IRAM_PRE1$$Base);
length = (unsigned int)&(Image$$LOAD_IRAM_PRE1$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
#endif
}
void CopyPre2RamtoImage(void)
{
UINT32 *src;
UINT32 *dst;
UINT32 length;
#if defined(__CC_ARM)
dst = &(Image$$LOAD_IRAM_PRE2$$Base);
src = &(Load$$LOAD_IRAM_PRE2$$Base);
length = (unsigned int)&(Image$$LOAD_IRAM_PRE2$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
#endif
}
void CopyDataRamtoImage(void)
{
UINT32 *src;
UINT32 *dst;
UINT32 length;
#if defined(__CC_ARM)
dst = &(Image$$LOAD_IRAM$$Base);
src = &(Load$$LOAD_IRAM$$Base);
length = (unsigned int)&(Image$$LOAD_IRAM$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
#endif
}
void CopyRWDataFromBin(void)
{
UINT32 *src;
UINT32 *dst;
UINT32 length;
#if defined(__CC_ARM)
dst = &(Image$$LOAD_DRAM_SHARED$$Base);
src = &(Load$$LOAD_DRAM_SHARED$$Base);
length = (unsigned int)&(Image$$LOAD_DRAM_SHARED$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
#endif
}

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@ -1,290 +0,0 @@
;/**************************************************************************//**
; * @file startup_ARMCM3.s
; * @brief CMSIS Core Device Startup File for
; * ARMCM3 Device Series
; * @version V5.00
; * @date 02. March 2016
; ******************************************************************************/
;/*
; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
; *
; * SPDX-License-Identifier: Apache-2.0
; *
; * Licensed under the Apache License, Version 2.0 (the License); you may
; * not use this file except in compliance with the License.
; * You may obtain a copy of the License at
; *
; * www.apache.org/licenses/LICENSE-2.0
; *
; * Unless required by applicable law or agreed to in writing, software
; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; * See the License for the specific language governing permissions and
; * limitations under the License.
; */
;/*
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;*/
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00001000
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
EXPORT Stack_Size
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
;Heap_Size EQU 0x00000C00
;
; AREA HEAP, NOINIT, READWRITE, ALIGN=3
;__heap_base
;Heap_Mem SPACE Heap_Size
;__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD Default_Handler ; Reserved
DCD Default_Handler ; Reserved
DCD Default_Handler ; Reserved
DCD Default_Handler ; Reserved
DCD Default_Handler ; SVCall Handler
DCD Default_Handler ; Debug Monitor Handler
DCD Default_Handler ; Reserved
DCD Default_Handler ; PendSV Handler
DCD Default_Handler ; SysTick Handler
; External Interrupts
DCD Pad0_WakeupIntHandler ; 0: Pad0 Wakeup
DCD Pad1_WakeupIntHandler ; 1: Pad1 Wakeup
DCD Pad2_WakeupIntHandler ; 2: Pad2 Wakeup
DCD Pad3_WakeupIntHandler ; 3: Pad3 Wakeup
DCD Pad4_WakeupIntHandler ; 4: Pad4 Wakeup
DCD Pad5_WakeupIntHandler ; 5: Pad5 Wakeup
DCD LPUART_WakeupIntHandler ; 6: LPUART Wakeup
DCD LPUSB_WakeupIntHandler ; 7: LPUSB Wakeup
DCD PwrKey_WakeupIntHandler ; 8: PwrKey Wakeup
DCD ChrgPad_WakeupIntHandler ; 9: ChrgPad Wakeup
DCD RTC_WakeupIntHandler ; 10: RTC Wakeup
DCD USB_WakeupIntHandler ; 11: USB Wakeup
DCD XIC_IntHandler ; 12:
DCD XIC_IntHandler ; 13
DCD XIC_IntHandler ; 14:
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT ec_main
IMPORT XIPInitFastInApRam
mrs r4, msp
LDR r0, =0x106000
msr msp, r0
LDR R0, =XIPInitFastInApRam
BLX R0
msr msp, r4
;ISB
;DSB
;NOP
;NOP
;NOP
;NOP
LDR R0, =0x4d020190 ; Not remapping
LDR R1, =0x00000000
STR R1, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =ec_main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
BL Default_Handler
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
BL Default_Handler
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
BL Default_Handler
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
BL Default_Handler
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Pad0_WakeupIntHandler PROC
EXPORT Pad0_WakeupIntHandler [WEAK]
B .
ENDP
Pad1_WakeupIntHandler PROC
EXPORT Pad1_WakeupIntHandler [WEAK]
B .
ENDP
Pad2_WakeupIntHandler PROC
EXPORT Pad2_WakeupIntHandler [WEAK]
B .
ENDP
Pad3_WakeupIntHandler PROC
EXPORT Pad3_WakeupIntHandler [WEAK]
B .
ENDP
Pad4_WakeupIntHandler PROC
EXPORT Pad4_WakeupIntHandler [WEAK]
B .
ENDP
Pad5_WakeupIntHandler PROC
EXPORT Pad5_WakeupIntHandler [WEAK]
B .
ENDP
LPUART_WakeupIntHandler PROC
EXPORT LPUART_WakeupIntHandler [WEAK]
B .
ENDP
LPUSB_WakeupIntHandler PROC
EXPORT LPUSB_WakeupIntHandler [WEAK]
B .
ENDP
PwrKey_WakeupIntHandler PROC
EXPORT PwrKey_WakeupIntHandler [WEAK]
B .
ENDP
ChrgPad_WakeupIntHandler PROC
EXPORT ChrgPad_WakeupIntHandler [WEAK]
B .
ENDP
RTC_WakeupIntHandler PROC
EXPORT RTC_WakeupIntHandler [WEAK]
B .
ENDP
USB_WakeupIntHandler PROC
EXPORT USB_WakeupIntHandler [WEAK]
B .
ENDP
XIC_IntHandler PROC
EXPORT XIC_IntHandler [WEAK]
B .
ENDP
Default_Handler PROC
B .
ENDP
__clr_240K_mem PROC
MOVS R0, #0
STM R6!,{R0}
ADDS R5, R5, #1
CMP R5, #0xEC00
BCC __clr_240K_mem
LDR R0, =0x08080000
LDR SP, [R0,#0]
MOVS LR, R7
BX LR
ENDP
ALIGN
; User Initial Stack & Heap
; IF :DEF:__MICROLIB
EXPORT __initial_sp
; EXPORT __heap_base
; EXPORT __heap_limit
; ELSE
; IMPORT __use_two_region_memory
; EXPORT __user_initial_stackheap
;__user_initial_stackheap PROC
; LDR R0, = Heap_Mem
; LDR R1, =(Stack_Mem + Stack_Size)
; LDR R2, = (Heap_Mem + Heap_Size)
; LDR R3, = Stack_Mem
; BX LR
; ENDP
; ALIGN
; ENDIF
END

View File

@ -1,300 +0,0 @@
AVAILABLE_TARGETS = ec7xx_ref_1h00
TOOLCHAIN = GCC
BINNAME = ap_bootloader
TOP := ../../../../../../..
FLOAT_FLAG_ENABLE = n
BIN_COMPRESS = n
FPGA_DEBUG = n
BUILD_EC_MW = n
BUILD_PS = n
BUILD_FW = n
BUILD_OS = n
BUILD_OSA = n
BUILD_AT = n
BUILD_AT_DEBUG = n
DRIVER_PMU_ENABLE = n
DRIVER_FLASHRT_ENABLE = n
DRIVER_ECMAIN_ENABLE = n
DRIVER_UTFC_ENABLE = n
DRIVER_VPU_ENABLE = n
#DRIVER_GPR_ENABLE = y
DRIVER_ULDP_ENABLE = n
DRIVER_USB_ENABLE = n
DRIVER_USBSMIMG_ENABLE = y
ifeq ($(TYPE), ec718h)
DRIVER_CPFLASH_ENABLE = y
endif
THIRDPARTY_MQTT_ENABLE = n
THIRDPARTY_CISONENET_ENABLE = n
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_LITTEFS_ENABLE = n
THIRDPARTY_RTT_ENABLE = n
THIRDPARTY_LWIP_ENABLE = n
THIRDPARTY_PING_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = n
THIRDPARTY_DHCPD_ENABLE = n
THIRDPARTY_MP3_ENABLE = n
DRIVER_DMA_ENABLE = n
DRIVER_USART_ENABLE = n
DRIVER_SPI_ENABLE = n
DRIVER_I2C_ENABLE = n
DRIVER_PMU_ENABLE = n
DRIVER_FLASHRT_ENABLE = n
DRIVER_TIMER_ENABLE = n
DRIVER_LPUART_ENABLE = n
DRIVER_UNILOG_ENABLE = n
DRIVER_CIPHER_ENABLE = y
DRIVER_SCT_ENABLE = n
DRIVER_SLCNT_ENABLE = n
DRIVER_MCUMODE_ENABLE = n
DRIVER_ADC_ENABLE = n
DRIVER_PWRKEY_ENABLE = y
DRIVER_CHARGE_ENABLE = n
DRIVER_CAMERA_ENABLE = n
DRIVER_I2S_ENABLE = n
DRIVER_IPC_ENABLE = n
DRIVER_RESET_ENABLE = n
DRIVER_EXCP_ENABLE = n
DRIVER_CPADC_ENABLE = n
DRIVER_RFCALI_ENABLE = n
DRIVER_PHYHAL_ENABLE = n
DRIVER_ALARM_ENABLE = n
MIDDLEWARE_DEBUG_TRACE_ENABLE = n
MIDDLEWARE_CMS_ENABLE = n
MIDDLEWARE_SIMBIP_ENABLE = n
MIDDLEWARE_NVRAM_ENABLE = y
MIDDLEWARE_RUNNV_ENABLE = n
MIDDLEWARE_CCIO_ENABLE = n
MIDDLEWARE_FOTA_ENABLE = y
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_CORE2_ENABLE = y
MIDDLEWARE_FOTA_USBURC_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
ifeq ($(MIDDLEWARE_FOTA_CORE2_ENABLE), y)
#hls only for core2
MIDDLEWARE_FOTA_HLS_ENABLE = y
endif
ifeq ($(MIDDLEWARE_FOTAPAR_ENABLE), y)
ifeq ($(FOTA_SIGN), fota_sign)
#signature of the fota *.par/.fpar
MIDDLEWARE_FOTA_SIGN_ENABLE = y
endif
endif
#check fota settings
ifeq ($(MIDDLEWARE_FOTA_ENABLE)_$(MIDDLEWARE_FOTAPAR_ENABLE),y_n)
$(error "MIDDLEWARE_FOTAPAR_ENABLE" should be "y")
endif
ifeq ($(MIDDLEWARE_FOTA_USBURC_ENABLE)_$(MIDDLEWARE_FOTA_FS_ENABLE),y_y)
$(error FOTA "USBURC" and "NVM FS" can't be "y" simultaneously for lack of flash resource)
endif
ifeq ($(MIDDLEWARE_FOTA_FS_ENABLE),y)
THIRDPARTY_LITTEFS_ENABLE = y
endif
#always enable lto for bl code size reduction
LTO_ENABLE = true
THIRDPARTY_QUIRC_ENABLE = n
THIRDPARTY_ZBAR_ENABLE = n
THIRDPARTY_MINILZO_ENABLE = n
THIRDPARTY_LZMA_ENABLE = y
THIRDPARTY_UECC_ENABLE = y
CONFIG_PROJ_APP_SECURITY_BOOT = n
ifeq ($(TYPE), ec718s)
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS += -DRAMCODE_COMPRESS_EN
CFLAGS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
endif
ifneq ($(findstring $(TYPE), ec716s ec716e ec718u),)
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS += -DRAMCODE_COMPRESS_EN
CFLAGS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
endif
ifneq ($(findstring $(TYPE), ec718p ec718pm ec718um ec718sm ec718hm),)
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS += -DRAMCODE_COMPRESS_EN
CFLAGS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
endif
ifneq ($(findstring $(TYPE), ec716s ec716e),)
ifeq ($(RAM_ENBALE), true)
CFLAGS_DEFS += -DFEATURE_MORERAM_ENABLE
endif
endif
ifeq ($(ROM_ENABLE), true)
CFLAGS_DEFS += -DFEATURE_MOREROM_ENABLE
ifeq ($(LESS_LOG), true)
CFLAGS_DEFS += -DFEATURE_LESSLOG_ENABLE
endif
endif
ifeq ($(OPENCPU), true)
OPENCPU_MODE_ENABLE = y
endif
ifeq ($(GCF_ENABLE), true)
GCF_FEATURE_ENABLE = y
endif
ifeq ($(MID_ENABLE), true)
MID_FEATURE_ENABLE = y
endif
ifeq ($(AUDIO_ENABLE), true)
MIDDLEWARE_VEM_ENABLE = y
MIDDLEWARE_AMR_ENABLE = y
endif
ifeq ($(IMS_ENABLE), true)
IMS_MODE_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_ENABLE), true)
IMS_SMSONLY_MODE_ENABLE = y
endif
ifeq ($(AUDIO_ENABLE), true)
AUDIO_MODE_ENABLE = y
endif
ifeq ($(TYPE), ec718pm)
DRIVER_XPI_PSRAM_ENABLE ?= y
DRIVER_PCACHE_ENABLE ?= y
EC718XM_LD_AND_PREC = y
endif
ifeq ($(TYPE), ec718um)
DRIVER_XPI_PSRAM_ENABLE ?= y
DRIVER_PCACHE_ENABLE ?= y
EC718XM_LD_AND_PREC = y
endif
ifeq ($(TYPE), ec718sm)
DRIVER_XPI_PSRAM_ENABLE ?= y
DRIVER_PCACHE_ENABLE ?= y
EC718XM_LD_AND_PREC = y
endif
ifeq ($(TYPE), ec718hm)
DRIVER_XPI_PSRAM_ENABLE ?= y
DRIVER_PCACHE_ENABLE ?= y
EC718XM_LD_AND_PREC = y
endif
BL_PROJ_DIR := PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)
CFLAGS_INC += -I ../inc \
-I $(TOP)/$(BL_PROJ_DIR)/code/include \
-I $(TOP)/$(BL_PROJ_DIR)/code/include/common \
-I $(TOP)/$(BL_PROJ_DIR)/code/common/secure/hash/inc
obj-y += $(BL_PROJ_DIR)/code/main/ec_main.o \
$(BL_PROJ_DIR)/code/main/bl_uart.o \
$(BL_PROJ_DIR)/code/main/bl_print.o \
$(BL_PROJ_DIR)/code/main/stub_os.o \
$(BL_PROJ_DIR)/code/common/image/image.o \
$(BL_PROJ_DIR)/code/common/secure/hash/src/sha256.o \
$(BL_PROJ_DIR)/code/except/exception_handler.o
ifeq ($(MIDDLEWARE_FOTA_FS_ENABLE),y)
obj-y += $(BL_PROJ_DIR)/code/main/bl_lfs.o
endif
PRECINIT_FILE_PATH = $(BL_PROJ_DIR)/$(TOOLCHAIN)
SYSTEM_FILE_PATH = $(BL_PROJ_DIR)/code/main
STARTUP_FILE_PATH = $(BL_PROJ_DIR)/$(TOOLCHAIN)
LINK_FILE_PATH = $(BL_PROJ_DIR)/$(TOOLCHAIN)
ifeq ($(TYPE), ec718pm)
LD_FILE := ec718xm/$(TARGET)_flash.ld
else ifeq ($(TYPE), ec718um)
LD_FILE := ec718xm/$(TARGET)_flash.ld
else ifeq ($(TYPE), ec718sm)
LD_FILE := ec718xm/$(TARGET)_flash.ld
else ifeq ($(TYPE), ec718hm)
LD_FILE := ec718xm/$(TARGET)_flash.ld
else
LD_FILE := $(TARGET)_flash.ld
endif
#security boot
ifeq ($(BUILD_ENV),linux)
EC_SECURE_TOOL := $(TOP)/PLAT/tools/ecsecure
else
EC_SECURE_TOOL := $(TOP)/PLAT/tools/ecsecure.exe
endif
ifeq ($(CONFIG_PROJ_APP_SECURITY_BOOT), y)
SYSTEM_VERIFY_KEY_FILE_SRC := $(BL_PROJ_DIR)/code/main/VerifyKeyFile.c
BL_KEYPAIR_PEM_FILE := $(TOP)/$(BL_PROJ_DIR)/code/main/pub_key_bl.pem
SYS_KEYPAIR_PEM_FILE := $(TOP)/$(BL_PROJ_DIR)/code/main/pub_key_sys.pem
$(TOP)/$(SYSTEM_VERIFY_KEY_FILE_SRC):
$(EC_SECURE_TOOL) PUBKEY=$(TOP)/$(SYSTEM_VERIFY_KEY_FILE_SRC) BLPEM=$(BL_KEYPAIR_PEM_FILE) SYSPEM=$(SYS_KEYPAIR_PEM_FILE)
SYSTEM_VERIFY_KEY_FILE_OBJ := $(SYSTEM_VERIFY_KEY_FILE_SRC:.c=.o)
obj-y += $(SYSTEM_VERIFY_KEY_FILE_OBJ)
endif
include $(TOP)/PLAT/tools/scripts/Makefile.rules
#enable wdt
CFLAGS += -DWDT_FEATURE_ENABLE=1
ifeq ($(DRIVER_USBSMIMG_ENABLE),y)
CFLAGS += -DUSBC_USBMST_MGR_FEATURE_DISABLE=1
CFLAGS += -DUSB_DRV_SMALL_IMAGE=1
endif
CFLAGS += -DFEATURE_BOOTLOADER_PROJECT_ENABLE
# define these two macro for amr & 3A test
ifeq ($(MIDDLEWARE_AMR_ENABLE),y)
CFLAGS_DEFS += -DFEATURE_AMR_CP_ENABLE
endif
ifeq ($(MIDDLEWARE_VEM_ENABLE),y)
CFLAGS_DEFS += -DFEATURE_VEM_CP_ENABLE
endif
#Make all warnings into errors
CFLAGS += -Werror
ifeq ($(CONFIG_PROJ_APP_SECURITY_BOOT), y)
CFLAGS += -DCONFIG_PROJ_APP_SECURITY_BOOT
endif
ifeq ($(LTO_FEATURE_ENABLE),y)
LDFLAGS += -Wno-stringop-overflow
endif

View File

@ -1,182 +0,0 @@
#include "mem_map.h"
#include "bl_link_mem_map.h"
/* Entry Point */
ENTRY(Reset_Handler)
/* Specify the memory areas */
MEMORY
{
ASMB_AREA_REMAP(rwx) : ORIGIN = ASMB_START_ADDR, LENGTH = ASMB_TOTAL_LENGTH /* 64KB */
MSMB_AREA(rwx) : ORIGIN = MSMB_START_ADDR, LENGTH = MSMB_TOTAL_LENGTH /* 1.25MB */
FLASH_AREA(rx) : ORIGIN = BOOTLOADER_FLASH_LOAD_ADDR, LENGTH = BOOTLOADER_FLASH_LOAD_UNZIP_SIZE /* 96KB */
CSMB_AREA(rwx) : ORIGIN = APVIEW_CSMB_START_ADDR, LENGTH = CSMB_TOTAL_LENGTH /* 64KB */
}
/* Define output sections */
SECTIONS
{
.vector BOOTLOADER_FLASH_LOAD_ADDR:
{
KEEP(*(.isr_vector))
} >FLASH_AREA
.unload_uncompress_flashcode :
{
*startup_ec7xx_gcc.o(.text* .rodata*)
*(.sect_bl_uncompress_flash_text.*)
*(.sect_bl_uncompress_flash_rodata.*)
*(.sect_cache_text.*)
*(.sect_cache_rodata.*)
*(.text.memset)
} >FLASH_AREA
.load_airam_pre1 ASMB_START_ADDR :
{
. = ALIGN(4);
Load$$LOAD_AIRAM_PRE1$$Base = LOADADDR(.load_airam_pre1);
Image$$LOAD_AIRAM_PRE1$$Base = .;
*(.sect_bl_airam_pre1_text.*)
*(.sect_bl_airam_pre1_rodata.*)
. = ALIGN(4);
} >ASMB_AREA_REMAP AT>FLASH_AREA
Image$$LOAD_AIRAM_PRE1$$Length = SIZEOF(.load_airam_pre1);
.load_airam_pre2 :
{
. = ALIGN(4);
Load$$LOAD_AIRAM_PRE2$$Base = LOADADDR(.load_airam_pre2);
Image$$LOAD_AIRAM_PRE2$$Base = .;
*(.sect_bl_airam_pre2_text.*)
*(.sect_bl_airam_pre2_rodata.*)
*(.sect_qspi_text.*)
*(.sect_flash_pre2text.*)
*(.sect_platdelay_text.*)
*(.sect_flashlock_text.*)
. = ALIGN(4);
} >ASMB_AREA_REMAP AT>FLASH_AREA
Image$$LOAD_AIRAM_PRE2$$Length = SIZEOF(.load_airam_pre2);
.unload_asmb_zi (NOLOAD):
{
. = ALIGN(4);
Image$$UNLOAD_BOOT_ASMB$$ZI$$Base = .;
*(.sect_boot_bss.*)
. = ALIGN(4);
Image$$UNLOAD_BOOT_ASMB$$ZI$$Limit = .;
} >ASMB_AREA_REMAP
PROVIDE(flashXIPLimit =LOADADDR(.load_airam_other));
.load_airam_other :
{
. = ALIGN(4);
Load$$LOAD_AIRAM_OTHER_RAMCODE$$Base = LOADADDR(.load_airam_other);
Image$$LOAD_AIRAM_OTHER_RAMCODE$$Base = .;
*(.rodata*)
*(.text*)
. = ALIGN(4);
} >ASMB_AREA_REMAP AT>FLASH_AREA
Image$$LOAD_AIRAM_OTHER_RAMCODE$$Length = SIZEOF(.load_airam_other);
.load_msmb_sct_zi (NOLOAD):
{
. = ALIGN(4);
Load$$LOAD_MSMB_SCT_DATA$$ZI$$Base = LOADADDR(.load_msmb_sct_zi);
Image$$LOAD_MSMB_SCT_DATA$$ZI$$Base = .;
*(.sect_platBlSctZIData_bss.*)
*(.sect_decompress_bss.*)
. = ALIGN(4);
Image$$LOAD_MSMB_SCT_DATA$$ZI$$Limit = .;
} >MSMB_AREA
Image$$LOAD_MSMB_SCT_DATA$$ZI$$Length = SIZEOF(.load_msmb_sct_zi);
.load_asmb_shared_data :
{
. = ALIGN(4);
Load$$LOAD_ASMB_SHARED_DATA$$Base = LOADADDR(.load_asmb_shared_data);
Image$$LOAD_ASMB_SHARED_DATA$$Base = .;
*(.sect_*_data.*)
*(.data*)
. = ALIGN(4);
} >ASMB_AREA_REMAP AT>FLASH_AREA
Image$$LOAD_ASMB_SHARED_DATA$$Length = SIZEOF(.load_asmb_shared_data);
.load_asmb_shared_zi (NOLOAD):
{
Image$$LOAD_ASMB_SHARED$$ZI$$Base = .;
// add asmb zi/bss here
Image$$LOAD_ASMB_SHARED$$ZI$$Limit = .;
// no init data(data init by sw function init)
*(.USB_NOINIT_DATA_BUF*)
} >ASMB_AREA_REMAP
.load_msmb_shared_zi (NOLOAD):
{
. = ALIGN(4);
Image$$LOAD_MSMB_SHARED$$ZI$$Base = .;
*(.sect_*_bss.*)
*(.bss*)
*(.stack)
. = ALIGN(4);
Image$$LOAD_MSMB_SHARED$$ZI$$Limit = .;
*(.sect_boot_noInit.*)
PROVIDE(end_msmb_software_loc = . );
} >MSMB_AREA
#ifndef FPGA_TEST
.load_ciram APVIEW_CSMB_HEAP_END:
#else
.load_ciram :
#endif
{
. = ALIGN(4);
Load$$LOAD_CIRAM_RAMCODE$$Base = LOADADDR(.load_ciram);
Image$$LOAD_CIRAM_RAMCODE$$Base = .;
*fota_nvm.o(.text*)
*(.sect_bl_ciram_flash_text.*)
*(.sect_bl_ciram_flash_rodata.*)
*(.sect_flash_text.*)
*(.sect_platPARamcode_text.*)
*(.memcpy.armv7m*)
*(.glue_7)
*(.glue_7t)
*(.vfpll_veneer)
*(.v4_bx)
*(.init*)
*(.fini*)
*(.iplt)
*(.igot.plt)
*(.rel.iplt)
. = ALIGN(4);
#ifndef FPGA_TEST
} >CSMB_AREA AT>FLASH_AREA
#else
} >MSMB_AREA AT>FLASH_AREA
#endif
Image$$LOAD_CIRAM_RAMCODE$$Length = SIZEOF(.load_ciram);
_fota_mux_buf_start = PSRAM_FOTA_MUXMEM_BASE_ADDR;
_fota_mux_buf_end = PSRAM_FOTA_MUXMEM_END_ADDR;
ASSERT(_fota_mux_buf_start>=end_msmb_software_loc,"bootloader software use too much msmb, overlap with fota buf!")
_compress_buf_start = PSRAM_COMPR_MEM_BASE_ADDR;
_compress_buf_end = PSRAM_COMPR_MEM_END_ADDR;
_decompress_buf_start = PSRAM_DECOMPR_MEM_BASE_ADDR;
_decompress_buf_end = PSRAM_DECOMPR_MEM_END_ADDR;
#if HEAP_EXIST
_heap_memory_start = APVIEW_CSMB_HEAP_START;
_heap_memory_end = APVIEW_CSMB_HEAP_END;
#endif
}
GROUP(
libgcc.a
libc.a
libm.a
)

View File

@ -1,261 +0,0 @@
#include <string.h>
#include "ec7xx.h"
#include "mem_map.h"
#ifdef RAMCODE_COMPRESS_EN
#include "LzmaEc.h"
#endif
#include "sctdef.h"
typedef unsigned long UINT32;
typedef unsigned short UINT16;
typedef unsigned char UINT8;
#if defined(__CC_ARM)
__asm void __fast_memset(UINT32 *dst, UINT32 value, UINT32 length)
{
push {r4-r9}
cmp r2, #0
beq memset_return
mov r4, r1
mov r5, r1
mov r6, r1
mov r7, r1
and r8, r2,#0xf
mov r9, r8
cmp r8, #0
beq clr_16Byte
clr_4Byte
stmia r0!,{r4}
subs r8,r8,#4
cmp r8,#0
bne clr_4Byte
sub r2,r2,r9
clr_16Byte
stmia r0!,{r4,r5,r6,r7}
subs r2,r2,#16
cmp r2,#0
bne clr_16Byte
memset_return
pop {r4-r9}
bx lr
}
#elif defined(__GNUC__)
PLAT_UNCOMP_FLASH_TEXT __attribute__((__noinline__)) void __fast_memset(UINT32 *dst, UINT32 value, UINT32 length)
{
asm volatile(
"cmp r2, #0\n\t"
"beq memset_return\n\t"
"mov r4, r1\n\t"
"mov r5, r1\n\t"
"mov r6, r1\n\t"
"mov r7, r1\n\t"
"and r8, r2,#0xf\n\t"
"mov r9, r8\n\t"
"cmp r8, #0\n\t"
"beq clr_16Byte\n\t"
"clr_4Byte:\n\t"
"stmia r0!,{r4}\n\t"
"subs r8,r8,#4\n\t"
"cmp r8,#0\n\t"
"bne clr_4Byte\n\t"
"sub r2,r2,r9\n\t"
"clr_16Byte:\n\t"
"stmia r0!,{r4,r5,r6,r7}\n\t"
"subs r2,r2,#16\n\t"
"cmp r2,#0\n\t"
"bne clr_16Byte\n\t"
"memset_return:\n\t"
: /* no outputs. */
: "r" (dst), "r" (value), "r" (length)
: "cc", "r0", "r1", "r2", "r4", "r5", "r6", "r7", "r8", "r9"
);
}
#endif
extern UINT32 Image$$UNLOAD_BOOT_ASMB$$ZI$$Base;
extern UINT32 Image$$UNLOAD_BOOT_ASMB$$ZI$$Limit;
extern UINT32 Load$$LOAD_AIRAM_PRE1$$Base ;
extern UINT32 Image$$LOAD_AIRAM_PRE1$$Base ;
extern UINT32 Image$$LOAD_AIRAM_PRE1$$Length ;
extern UINT32 Load$$LOAD_AIRAM_PRE2$$Base ;
extern UINT32 Image$$LOAD_AIRAM_PRE2$$Base ;
extern UINT32 Image$$LOAD_AIRAM_PRE2$$Length ;
extern UINT32 Load$$LOAD_ASMB_SHARED_DATA$$Base ;
extern UINT32 Image$$LOAD_ASMB_SHARED_DATA$$Base;
extern UINT32 Image$$LOAD_ASMB_SHARED_DATA$$Length;
extern UINT32 Image$$LOAD_ASMB_SHARED$$ZI$$Base;
extern UINT32 Image$$LOAD_ASMB_SHARED$$ZI$$Limit;
extern UINT32 Image$$LOAD_MSMB_SHARED$$ZI$$Base;
extern UINT32 Image$$LOAD_MSMB_SHARED$$ZI$$Limit;
extern UINT32 Load$$LOAD_AIRAM_OTHER_RAMCODE$$Base;
extern UINT32 Image$$LOAD_AIRAM_OTHER_RAMCODE$$Base;
extern UINT32 Image$$LOAD_AIRAM_OTHER_RAMCODE$$Length;
extern UINT32 Load$$LOAD_CIRAM_RAMCODE$$Base;
extern UINT32 Image$$LOAD_CIRAM_RAMCODE$$Base;
extern UINT32 Image$$LOAD_CIRAM_RAMCODE$$Length;
extern UINT32 __StackTop;
extern UINT32 __StackLimit;
extern void DisableICache(void);
extern void EnableICache(void);
#pragma GCC push_options
#pragma GCC optimize("O1")
PLAT_BL_UNCOMP_FLASH_TEXT void SetZIDataToZero(void)
{
UINT32 *start_addr;
UINT32 *end_addr ;
UINT32 length;
UINT32 stack_len = ((UINT32)&__StackTop - (UINT32)&__StackLimit);
start_addr = &(Image$$LOAD_MSMB_SHARED$$ZI$$Base) ;
end_addr = &(Image$$LOAD_MSMB_SHARED$$ZI$$Limit);
length = (UINT32)end_addr - (UINT32)start_addr;
__fast_memset((UINT32 *)start_addr, 0, length-stack_len);
start_addr = &(Image$$LOAD_ASMB_SHARED$$ZI$$Base);
end_addr = &(Image$$LOAD_ASMB_SHARED$$ZI$$Limit);
length = (UINT32)end_addr - (UINT32)start_addr;
__fast_memset((UINT32 *)start_addr, 0, length);
}
PLAT_BL_UNCOMP_FLASH_TEXT void CopyPre1RamtoImage(void)
{
uint32_t *src;
volatile uint32_t *dst;
register uint32_t length;
dst = &(Image$$LOAD_AIRAM_PRE1$$Base);
src = &(Load$$LOAD_AIRAM_PRE1$$Base);
length = (unsigned int)&(Image$$LOAD_AIRAM_PRE1$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
DisableICache();
EnableICache();
}
PLAT_BL_UNCOMP_FLASH_TEXT void CopyPre2RamtoImage(void)
{
uint32_t *src;
volatile uint32_t *dst;
register uint32_t length;
dst = &(Image$$LOAD_AIRAM_PRE2$$Base);
src = &(Load$$LOAD_AIRAM_PRE2$$Base);
length = (unsigned int)&(Image$$LOAD_AIRAM_PRE2$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
DisableICache();
EnableICache();
}
PLAT_BL_UNCOMP_FLASH_TEXT void SetBootZIDataToZero(void)
{
UINT32 *start_addr;
UINT32 *end_addr ;
UINT32 length;
start_addr = &(Image$$UNLOAD_BOOT_ASMB$$ZI$$Base) ;
end_addr = &(Image$$UNLOAD_BOOT_ASMB$$ZI$$Limit);
length = (UINT32)end_addr - (UINT32)start_addr;
__fast_memset((UINT32 *)start_addr, 0, length);
}
PLAT_BL_UNCOMP_FLASH_TEXT void CopyOtherCodetoImage(void)
{
#ifndef RAMCODE_COMPRESS_EN
uint32_t *src;
volatile uint32_t *dst;
register uint32_t length;
dst = &(Image$$LOAD_AIRAM_OTHER_RAMCODE$$Base);
src = &(Load$$LOAD_AIRAM_OTHER_RAMCODE$$Base);
length = (unsigned int)&(Image$$LOAD_AIRAM_OTHER_RAMCODE$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
dst = &(Image$$LOAD_CIRAM_RAMCODE$$Base);
src = &(Load$$LOAD_CIRAM_RAMCODE$$Base);
length = (unsigned int)&(Image$$LOAD_CIRAM_RAMCODE$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
#else
decompressRamCodeFromBin(SECTIONBL_LOAD_AIRAM_OTHER_RAMCODE);
decompressRamCodeFromBin(SECTIONBL_LOAD_CIRAM_RAMCODE);
#endif
DisableICache();
EnableICache();
}
PLAT_BL_UNCOMP_FLASH_TEXT void CopyRWDataFromBin(void)
{
#ifndef RAMCODE_COMPRESS_EN
uint32_t *src;
volatile uint32_t *dst;
register uint32_t length;
dst = &(Image$$LOAD_ASMB_SHARED_DATA$$Base);
src = &(Load$$LOAD_ASMB_SHARED_DATA$$Base);
length = (unsigned int)&(Image$$LOAD_ASMB_SHARED_DATA$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
#else
decompressRamCodeFromBin(SECTIONBL_LOAD_ASMB_SHARED);
#endif
DisableICache();
EnableICache();
}
#pragma GCC pop_options

View File

@ -1,159 +0,0 @@
#include "mem_map.h"
#include "bl_link_mem_map.h"
/* Entry Point */
ENTRY(Reset_Handler)
/* Specify the memory areas */
MEMORY
{
ASMB_AREA_REMAP(rwx) : ORIGIN = ASMB_START_ADDR, LENGTH = ASMB_TOTAL_LENGTH /* 64KB */
MSMB_AREA(rwx) : ORIGIN = MSMB_START_ADDR, LENGTH = MSMB_TOTAL_LENGTH /* 1.25MB */
FLASH_AREA(rx) : ORIGIN = BOOTLOADER_FLASH_LOAD_ADDR, LENGTH = BOOTLOADER_FLASH_LOAD_UNZIP_SIZE /* 96KB */
CSMB_AREA(rwx) : ORIGIN = APVIEW_CSMB_START_ADDR, LENGTH = CSMB_TOTAL_LENGTH /* 64KB */
}
/* Define output sections */
SECTIONS
{
.vector BOOTLOADER_FLASH_LOAD_ADDR:
{
KEEP(*(.isr_vector))
} >FLASH_AREA
.unload_uncompress_flashcode :
{
*startup_ec7xx_gcc.o(.text* .rodata*)
*(.sect_bl_uncompress_flash_text.*)
*(.sect_bl_uncompress_flash_rodata.*)
*(.sect_cache_text.*)
*(.sect_cache_rodata.*)
*(.text.memset)
} >FLASH_AREA
.load_airam_pre1 ASMB_START_ADDR :
{
. = ALIGN(4);
Load$$LOAD_AIRAM_PRE1$$Base = LOADADDR(.load_airam_pre1);
Image$$LOAD_AIRAM_PRE1$$Base = .;
*(.sect_bl_airam_pre1_text.*)
*(.sect_bl_airam_pre1_rodata.*)
. = ALIGN(4);
} >ASMB_AREA_REMAP AT>FLASH_AREA
Image$$LOAD_AIRAM_PRE1$$Length = SIZEOF(.load_airam_pre1);
.load_airam_pre2 :
{
. = ALIGN(4);
Load$$LOAD_AIRAM_PRE2$$Base = LOADADDR(.load_airam_pre2);
Image$$LOAD_AIRAM_PRE2$$Base = .;
*(.sect_bl_airam_pre2_text.*)
*(.sect_bl_airam_pre2_rodata.*)
*(.sect_qspi_text.*)
*(.sect_flash_pre2text.*)
*(.sect_platdelay_text.*)
*(.sect_flashlock_text.*)
. = ALIGN(4);
} >ASMB_AREA_REMAP AT>FLASH_AREA
Image$$LOAD_AIRAM_PRE2$$Length = SIZEOF(.load_airam_pre2);
PROVIDE(flashXIPLimit =LOADADDR(.load_airam_other));
.load_airam_other :
{
. = ALIGN(4);
Load$$LOAD_AIRAM_OTHER_RAMCODE$$Base = LOADADDR(.load_airam_other);
Image$$LOAD_AIRAM_OTHER_RAMCODE$$Base = .;
*(.rodata*)
*(.text*)
} >ASMB_AREA_REMAP AT>FLASH_AREA
Image$$LOAD_AIRAM_OTHER_RAMCODE$$Length = SIZEOF(.load_airam_other);
.load_miram_sct_zi (NOLOAD):
{
. = ALIGN(4);
Load$$LOAD_MIRAM_SCT_DATA$$ZI$$Base = LOADADDR(.load_miram_sct_zi);
Image$$LOAD_MIRAM_SCT_DATA$$ZI$$Base = .;
*(.sect_platBlSctZIData_bss.*)
*(.sect_decompress_bss.*)
. = ALIGN(4);
Image$$LOAD_MIRAM_SCT_DATA$$ZI$$Limit = .;
} >MSMB_AREA
Image$$LOAD_MIRAM_SCT_DATA$$ZI$$Length = SIZEOF(.load_miram_sct_zi);
.load_airam_shared_data :
{
. = ALIGN(4);
Load$$LOAD_AIRAM_SHARED_DATA$$Base = LOADADDR(.load_airam_shared_data);
Image$$LOAD_AIRAM_SHARED_DATA$$Base = .;
*(.sect_*_data.*)
*(.data*)
. = ALIGN(4);
Image$$LOAD_AIRAM_SHARED_DATA$$Limit = .;
*(.USB_NOINIT_DATA_BUF*)
} >ASMB_AREA_REMAP AT>FLASH_AREA
Image$$LOAD_AIRAM_SHARED_DATA$$Length = SIZEOF(.load_airam_shared_data);
.load_miram_shared_zi (NOLOAD):
{
. = ALIGN(4);
Load$$LOAD_MIRAM_SHARED$$ZI$$Base = LOADADDR(.load_miram_shared_zi);
Image$$LOAD_MIRAM_SHARED$$ZI$$Base = .;
*(.sect_*_bss.*)
*(.bss*)
*(.stack)
Image$$LOAD_MIRAM_SHARED$$ZI$$Limit = .;
. = ALIGN(4);
PROVIDE(end_msmb_software_loc = . );
} >MSMB_AREA
Image$$LOAD_MIRAM_SHARED$$ZI$$Length = SIZEOF(.load_miram_shared_zi);
.load_ciram APVIEW_CSMB_HEAP_END:
{
. = ALIGN(4);
Load$$LOAD_CIRAM_RAMCODE$$Base = LOADADDR(.load_ciram);
Image$$LOAD_CIRAM_RAMCODE$$Base = .;
*fota_nvm.o(.text*)
*(.sect_bl_ciram_flash_text.*)
*(.sect_bl_ciram_flash_rodata.*)
*(.sect_flash_text.*)
*(.sect_platPARamcode_text.*)
*(.memcpy.armv7m*)
*(.glue_7)
*(.glue_7t)
*(.vfpll_veneer)
*(.v4_bx)
*(.init*)
*(.fini*)
*(.iplt)
*(.igot.plt)
*(.rel.iplt)
. = ALIGN(4);
} >CSMB_AREA AT>FLASH_AREA
Image$$LOAD_CIRAM_RAMCODE$$Length = SIZEOF(.load_ciram);
_fota_mux_buf_start = MSMB_FOTA_MUXMEM_BASE_ADDR;
_fota_mux_buf_end = MSMB_FOTA_MUXMEM_END_ADDR;
ASSERT(_fota_mux_buf_start>=end_msmb_software_loc,"bootloader software use too much msmb, overlap with fota buf!")
_compress_buf_start = MSMB_COMPR_MEM_BASE_ADDR;
_compress_buf_end = MSMB_COMPR_MEM_END_ADDR;
_decompress_buf_start = MSMB_DECOMPR_MEM_BASE_ADDR;
_decompress_buf_end = MSMB_DECOMPR_MEM_END_ADDR;
#if HEAP_EXIST
_heap_memory_start = HEAP_START_ADDR;
_heap_memory_end = HEAP_END_ADDR;
__heap_memory_size = _heap_memory_end - _heap_memory_start;
ASSERT(__heap_memory_size<=HEAP_PROTECT_SIZE,"Can't expand the size of heap, with the risk of overwriting other Sram!")
#endif
}
GROUP(
libgcc.a
libc.a
libm.a
)

View File

@ -1,270 +0,0 @@
#include <string.h>
#include "ec7xx.h"
#include "mem_map.h"
#ifdef RAMCODE_COMPRESS_EN
#include "LzmaEc.h"
#endif
#include "sctdef.h"
typedef unsigned long UINT32;
typedef unsigned short UINT16;
typedef unsigned char UINT8;
#if defined(__CC_ARM)
__asm void __fast_memset(UINT32 *dst, UINT32 value, UINT32 length)
{
push {r4-r9}
cmp r2, #0
beq memset_return
mov r4, r1
mov r5, r1
mov r6, r1
mov r7, r1
and r8, r2,#0xf
mov r9, r8
cmp r8, #0
beq clr_16Byte
clr_4Byte
stmia r0!,{r4}
subs r8,r8,#4
cmp r8,#0
bne clr_4Byte
sub r2,r2,r9
clr_16Byte
stmia r0!,{r4,r5,r6,r7}
subs r2,r2,#16
cmp r2,#0
bne clr_16Byte
memset_return
pop {r4-r9}
bx lr
}
#elif defined(__GNUC__)
__attribute__((__noinline__)) void __fast_memset(UINT32 *dst, UINT32 value, UINT32 length)
{
asm volatile(
"cmp r2, #0\n\t"
"beq memset_return\n\t"
"mov r4, r1\n\t"
"mov r5, r1\n\t"
"mov r6, r1\n\t"
"mov r7, r1\n\t"
"and r8, r2,#0xf\n\t"
"mov r9, r8\n\t"
"cmp r8, #0\n\t"
"beq clr_16Byte\n\t"
"clr_4Byte:\n\t"
"stmia r0!,{r4}\n\t"
"subs r8,r8,#4\n\t"
"cmp r8,#0\n\t"
"bne clr_4Byte\n\t"
"sub r2,r2,r9\n\t"
"clr_16Byte:\n\t"
"stmia r0!,{r4,r5,r6,r7}\n\t"
"subs r2,r2,#16\n\t"
"cmp r2,#0\n\t"
"bne clr_16Byte\n\t"
"memset_return:\n\t"
: /* no outputs. */
: "r" (dst), "r" (value), "r" (length)
: "cc", "r0", "r1", "r2", "r4", "r5", "r6", "r7", "r8", "r9"
);
}
#endif
extern UINT32 Load$$AP_IRAM_XIP_START$$Base ;
extern UINT32 Image$$AP_IRAM_XIP_START$$Base ;
extern UINT32 Image$$AP_IRAM_XIP_START$$Length ;
extern UINT32 Load$$LOAD_AIRAM_PRE1$$Base ;
extern UINT32 Image$$LOAD_AIRAM_PRE1$$Base ;
extern UINT32 Image$$LOAD_AIRAM_PRE1$$Length ;
extern UINT32 Load$$LOAD_AIRAM_PRE2$$Base ;
extern UINT32 Image$$LOAD_AIRAM_PRE2$$Base ;
extern UINT32 Image$$LOAD_AIRAM_PRE2$$Length ;
extern UINT32 Load$$LOAD_AIRAM_FLASH$$Base ;
extern UINT32 Image$$LOAD_AIRAM_FLASH$$Base ;
extern UINT32 Image$$LOAD_AIRAM_FLASH$$Length;
extern UINT32 Load$$LOAD_AIRAM_SHARED_DATA$$Base ;
extern UINT32 Image$$LOAD_AIRAM_SHARED_DATA$$Base;
extern UINT32 Image$$LOAD_AIRAM_SHARED_DATA$$Length;
extern UINT32 Image$$LOAD_MIRAM_SHARED$$ZI$$Base;
extern UINT32 Image$$LOAD_MIRAM_SHARED$$ZI$$Limit;
extern UINT32 Load$$LOAD_AIRAM_OTHER_RAMCODE$$Base;
extern UINT32 Image$$LOAD_AIRAM_OTHER_RAMCODE$$Base;
extern UINT32 Image$$LOAD_AIRAM_OTHER_RAMCODE$$Length;
extern UINT32 Load$$LOAD_CIRAM_RAMCODE$$Base;
extern UINT32 Image$$LOAD_CIRAM_RAMCODE$$Base;
extern UINT32 Image$$LOAD_CIRAM_RAMCODE$$Length;
extern UINT32 __StackTop;
extern UINT32 __StackLimit;
extern void DisableICache(void);
extern void EnableICache(void);
#pragma GCC push_options
#pragma GCC optimize("O1")
PLAT_BL_UNCOMP_FLASH_TEXT void SetZIDataToZero(void)
{
UINT32 *start_addr;
UINT32 *end_addr ;
UINT32 length;
UINT32 stack_len = ((UINT32)&__StackTop - (UINT32)&__StackLimit);
start_addr = &(Image$$LOAD_MIRAM_SHARED$$ZI$$Base) ;
end_addr = &(Image$$LOAD_MIRAM_SHARED$$ZI$$Limit);
length = (UINT32)end_addr - (UINT32)start_addr;
__fast_memset((UINT32 *)start_addr, 0, length-stack_len);
}
PLAT_BL_UNCOMP_FLASH_TEXT void CopyXipStartRwToImage(void)
{
UINT32 *src;
UINT32 *dst;
UINT32 length;
dst = &(Image$$AP_IRAM_XIP_START$$Base);
src = &(Load$$AP_IRAM_XIP_START$$Base);
length = (unsigned int)&(Image$$AP_IRAM_XIP_START$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
}
PLAT_BL_UNCOMP_FLASH_TEXT void CopyPre1RamtoImage(void)
{
UINT32 *src;
UINT32 *dst;
UINT32 length;
dst = &(Image$$LOAD_AIRAM_PRE1$$Base);
src = &(Load$$LOAD_AIRAM_PRE1$$Base);
length = (unsigned int)&(Image$$LOAD_AIRAM_PRE1$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
DisableICache();
EnableICache();
}
PLAT_BL_UNCOMP_FLASH_TEXT void CopyPre2RamtoImage(void)
{
UINT32 *src;
UINT32 *dst;
UINT32 length;
dst = &(Image$$LOAD_AIRAM_PRE2$$Base);
src = &(Load$$LOAD_AIRAM_PRE2$$Base);
length = (unsigned int)&(Image$$LOAD_AIRAM_PRE2$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
DisableICache();
EnableICache();
}
PLAT_BL_UNCOMP_FLASH_TEXT void CopyOtherCodetoImage(void)
{
#ifndef RAMCODE_COMPRESS_EN
UINT32 *src;
UINT32 *dst;
UINT32 length;
dst = &(Image$$LOAD_AIRAM_OTHER_RAMCODE$$Base);
src = &(Load$$LOAD_AIRAM_OTHER_RAMCODE$$Base);
length = (unsigned int)&(Image$$LOAD_AIRAM_OTHER_RAMCODE$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
dst = &(Image$$LOAD_CIRAM_RAMCODE$$Base);
src = &(Load$$LOAD_CIRAM_RAMCODE$$Base);
length = (unsigned int)&(Image$$LOAD_CIRAM_RAMCODE$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
#else
decompressRamCodeFromBin(SECTIONBL_LOAD_AIRAM_OTHER_RAMCODE);
decompressRamCodeFromBin(SECTIONBL_LOAD_CIRAM_RAMCODE);
#endif
DisableICache();
EnableICache();
}
PLAT_BL_UNCOMP_FLASH_TEXT void CopyRWDataFromBin(void)
{
#ifndef RAMCODE_COMPRESS_EN
UINT32 *src;
UINT32 *dst;
UINT32 length;
dst = &(Image$$LOAD_AIRAM_SHARED_DATA$$Base);
src = &(Load$$LOAD_AIRAM_SHARED_DATA$$Base);
length = (unsigned int)&(Image$$LOAD_AIRAM_SHARED_DATA$$Length);
length /= sizeof(unsigned int);
if(dst != src)
{
while(length >0)
{
dst[length-1]=src[length-1];
length--;
}
}
#else
decompressRamCodeFromBin(SECTIONBL_LOAD_AIRAM_SHARED);
#endif
DisableICache();
EnableICache();
}
#pragma GCC pop_options

View File

@ -1,29 +0,0 @@
{
"memfile":"mem_map.txt",
"flashloadAddr": "BOOTLOADER_FLASH_LOAD_ADDR",
"flashloadSize": "BOOTLOADER_FLASH_LOAD_SIZE",
"flashxipEnding": "flashXIPLimit",
"sectGrp":[
{
"grpId":0,
"grpSize":65536,
"sect":[
{
"secname":"load_airam_shared_data",
"sectype":"SECTIONBL_LOAD_AIRAM_SHARED",
"isCompressed":true
},
{
"secname":"load_airam_other",
"sectype":"SECTIONBL_LOAD_AIRAM_OTHER_RAMCODE",
"isCompressed":true
},
{
"secname":"load_ciram",
"sectype":"SECTIONBL_LOAD_CIRAM_RAMCODE",
"isCompressed":true
}
]
}
]
}

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@ -1,29 +0,0 @@
{
"memfile":"mem_map.txt",
"flashloadAddr": "BOOTLOADER_FLASH_LOAD_ADDR",
"flashloadSize": "BOOTLOADER_FLASH_LOAD_SIZE",
"flashxipEnding": "flashXIPLimit",
"sectGrp":[
{
"grpId":0,
"grpSize":65536,
"sect":[
{
"secname":"load_airam_shared_data",
"sectype":"SECTIONBL_LOAD_AIRAM_SHARED",
"isCompressed":true
},
{
"secname":"load_airam_other",
"sectype":"SECTIONBL_LOAD_AIRAM_OTHER_RAMCODE",
"isCompressed":true
},
{
"secname":"load_ciram",
"sectype":"SECTIONBL_LOAD_CIRAM_RAMCODE",
"isCompressed":true
}
]
}
]
}

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@ -1,29 +0,0 @@
{
"memfile":"mem_map.txt",
"flashloadAddr": "BOOTLOADER_FLASH_LOAD_ADDR",
"flashloadSize": "BOOTLOADER_FLASH_LOAD_SIZE",
"flashxipEnding": "flashXIPLimit",
"sectGrp":[
{
"grpId":0,
"grpSize":65536,
"sect":[
{
"secname":"load_asmb_shared_data",
"sectype":"SECTIONBL_LOAD_ASMB_SHARED",
"isCompressed":true
},
{
"secname":"load_airam_other",
"sectype":"SECTIONBL_LOAD_AIRAM_OTHER_RAMCODE",
"isCompressed":true
},
{
"secname":"load_ciram",
"sectype":"SECTIONBL_LOAD_CIRAM_RAMCODE",
"isCompressed":true
}
]
}
]
}

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@ -1,29 +0,0 @@
{
"memfile":"mem_map.txt",
"flashloadAddr": "BOOTLOADER_FLASH_LOAD_ADDR",
"flashloadSize": "BOOTLOADER_FLASH_LOAD_SIZE",
"flashxipEnding": "flashXIPLimit",
"sectGrp":[
{
"grpId":0,
"grpSize":65536,
"sect":[
{
"secname":"load_airam_shared_data",
"sectype":"SECTIONBL_LOAD_AIRAM_SHARED",
"isCompressed":true
},
{
"secname":"load_airam_other",
"sectype":"SECTIONBL_LOAD_AIRAM_OTHER_RAMCODE",
"isCompressed":true
},
{
"secname":"load_ciram",
"sectype":"SECTIONBL_LOAD_CIRAM_RAMCODE",
"isCompressed":true
}
]
}
]
}

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@ -1,29 +0,0 @@
{
"memfile":"mem_map.txt",
"flashloadAddr": "BOOTLOADER_FLASH_LOAD_ADDR",
"flashloadSize": "BOOTLOADER_FLASH_LOAD_SIZE",
"flashxipEnding": "flashXIPLimit",
"sectGrp":[
{
"grpId":0,
"grpSize":65536,
"sect":[
{
"secname":"load_asmb_shared_data",
"sectype":"SECTIONBL_LOAD_ASMB_SHARED",
"isCompressed":true
},
{
"secname":"load_airam_other",
"sectype":"SECTIONBL_LOAD_AIRAM_OTHER_RAMCODE",
"isCompressed":true
},
{
"secname":"load_ciram",
"sectype":"SECTIONBL_LOAD_CIRAM_RAMCODE",
"isCompressed":true
}
]
}
]
}

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@ -1,29 +0,0 @@
{
"memfile":"mem_map.txt",
"flashloadAddr": "BOOTLOADER_FLASH_LOAD_ADDR",
"flashloadSize": "BOOTLOADER_FLASH_LOAD_SIZE",
"flashxipEnding": "flashXIPLimit",
"sectGrp":[
{
"grpId":0,
"grpSize":65536,
"sect":[
{
"secname":"load_airam_shared_data",
"sectype":"SECTIONBL_LOAD_AIRAM_SHARED",
"isCompressed":true
},
{
"secname":"load_airam_other",
"sectype":"SECTIONBL_LOAD_AIRAM_OTHER_RAMCODE",
"isCompressed":true
},
{
"secname":"load_ciram",
"sectype":"SECTIONBL_LOAD_CIRAM_RAMCODE",
"isCompressed":true
}
]
}
]
}

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@ -1,29 +0,0 @@
{
"memfile":"mem_map.txt",
"flashloadAddr": "BOOTLOADER_FLASH_LOAD_ADDR",
"flashloadSize": "BOOTLOADER_FLASH_LOAD_SIZE",
"flashxipEnding": "flashXIPLimit",
"sectGrp":[
{
"grpId":0,
"grpSize":65536,
"sect":[
{
"secname":"load_asmb_shared_data",
"sectype":"SECTIONBL_LOAD_ASMB_SHARED",
"isCompressed":true
},
{
"secname":"load_airam_other",
"sectype":"SECTIONBL_LOAD_AIRAM_OTHER_RAMCODE",
"isCompressed":true
},
{
"secname":"load_ciram",
"sectype":"SECTIONBL_LOAD_CIRAM_RAMCODE",
"isCompressed":true
}
]
}
]
}

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@ -1,29 +0,0 @@
{
"memfile":"mem_map.txt",
"flashloadAddr": "BOOTLOADER_FLASH_LOAD_ADDR",
"flashloadSize": "BOOTLOADER_FLASH_LOAD_SIZE",
"flashxipEnding": "flashXIPLimit",
"sectGrp":[
{
"grpId":0,
"grpSize":65536,
"sect":[
{
"secname":"load_airam_shared_data",
"sectype":"SECTIONBL_LOAD_AIRAM_SHARED",
"isCompressed":true
},
{
"secname":"load_airam_other",
"sectype":"SECTIONBL_LOAD_AIRAM_OTHER_RAMCODE",
"isCompressed":true
},
{
"secname":"load_ciram",
"sectype":"SECTIONBL_LOAD_CIRAM_RAMCODE",
"isCompressed":true
}
]
}
]
}

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@ -1,29 +0,0 @@
{
"memfile":"mem_map.txt",
"flashloadAddr": "BOOTLOADER_FLASH_LOAD_ADDR",
"flashloadSize": "BOOTLOADER_FLASH_LOAD_SIZE",
"flashxipEnding": "flashXIPLimit",
"sectGrp":[
{
"grpId":0,
"grpSize":65536,
"sect":[
{
"secname":"load_asmb_shared_data",
"sectype":"SECTIONBL_LOAD_ASMB_SHARED",
"isCompressed":true
},
{
"secname":"load_airam_other",
"sectype":"SECTIONBL_LOAD_AIRAM_OTHER_RAMCODE",
"isCompressed":true
},
{
"secname":"load_ciram",
"sectype":"SECTIONBL_LOAD_CIRAM_RAMCODE",
"isCompressed":true
}
]
}
]
}

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@ -1,133 +0,0 @@
.syntax unified
.arch armv7-m
.cpu cortex-m3
.global __isr_vector
.global Reset_Handler
.global __StackTop
.global __StackLimit
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0x1000
#endif
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .isr_vector,"a",%progbits
.align 2
.type __isr_vector, %object
.size __isr_vector, .- __isr_vector
__isr_vector:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long MemManage_Handler /* MPU Fault Handler */
.long BusFault_Handler /* Bus Fault Handler */
.long UsageFault_Handler /* Usage Fault Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long DebugMon_Handler /* Debug Monitor Handler */
.long 0 /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long SysTick_Handler /* SysTick Handler */
/* External interrupts */
.long STUB_WakeupIntHandler /* 0: Pad0 Wakeup */
.long STUB_WakeupIntHandler /* 1: Pad1 Wakeup */
.long STUB_WakeupIntHandler /* 2: Pad2 Wakeup */
.long STUB_WakeupIntHandler /* 3: Pad3 Wakeup */
.long STUB_WakeupIntHandler /* 4: Pad4 Wakeup */
.long STUB_WakeupIntHandler /* 5: Pad5 Wakeup */
.long STUB_WakeupIntHandler /* 6: LPUART Wakeup */
.long STUB_WakeupIntHandler /* 7: LPUSB Wakeup */
.long PwrKey_WakeupIntHandler /* 8: PwrKey Wakeup */
.long ChrgPad_WakeupIntHandler /* 9: ChrgPad Wakeup */
.long STUB_WakeupIntHandler /* 10: RTC Wakeup */
.long USB_IRQ_Handler /* 11: USB Wakeup */
.long STUB_WakeupIntHandler /* 12: TMU Systk */
.long STUB_WakeupIntHandler /* 13: XIC IRQ */
.long STUB_WakeupIntHandler /* 14: XIC IRQ */
.long STUB_WakeupIntHandler /* 15: XIC IRQ */
.long STUB_WakeupIntHandler /* 16: XIC IRQ */
.text
.thumb
.thumb_func
.align 2
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =0x4f020190
ldr r1, =0x00000000
str r1, [r0]
ldr r0, =0x4f020130
ldr r1, =0x00000002
str r1, [r0]
.extern SystemInit
.extern ec_main
ldr r0, =SystemInit
blx r0
ldr r0, =ec_main
bx r0
.size Reset_Handler, .-Reset_Handler
.thumb
.thumb_func
.align 2
.type HardFault_Handler, %function
HardFault_Handler:
B .
.size HardFault_Handler, .-HardFault_Handler
.align 1
.thumb
.thumb_func
.weak Default_Handler
.type Default_Handler, %function
Default_Handler:
b .
.size Default_Handler, .-Default_Handler
.macro def_irq_handler handler_name
.weak \handler_name
.thumb_set \handler_name, Default_Handler
.endm
def_irq_handler NMI_Handler
def_irq_handler HardFault_Handler
def_irq_handler MemManage_Handler
def_irq_handler BusFault_Handler
def_irq_handler UsageFault_Handler
def_irq_handler SVC_Handler
def_irq_handler DebugMon_Handler
def_irq_handler PendSV_Handler
def_irq_handler SysTick_Handler
def_irq_handler STUB_WakeupIntHandler
def_irq_handler STUB_WakeupIntHandler
def_irq_handler STUB_WakeupIntHandler
def_irq_handler STUB_WakeupIntHandler
def_irq_handler STUB_WakeupIntHandler
def_irq_handler STUB_WakeupIntHandler
def_irq_handler STUB_WakeupIntHandler
def_irq_handler STUB_WakeupIntHandler
def_irq_handler STUB_WakeupIntHandler
def_irq_handler PwrKey_WakeupIntHandler
def_irq_handler ChrgPad_WakeupIntHandler
def_irq_handler USB_IRQ_Handler
def_irq_handler STUB_WakeupIntHandler
def_irq_handler STUB_WakeupIntHandler
.end

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@ -1,365 +0,0 @@
#include "error.h"
#include "common.h"
#include "ec7xx.h"
#include "image.h"
#include "boot.h"
#include "string.h"
#include "flash_rt.h"
#include "sha256.h"
#include "stdio.h"
#include "cp_flash.h"
#include "mw_aal_hash.h"
#define VERIFY_STATISTIC
#define OUTDATA_BYTE nSHA224_OUTDATA_BYTE
extern uint8_t *GetVerifyPubKey(void);
extern uint8_t FLASH_XIPRead(uint8_t* pData, uint32_t ReadAddr, uint32_t Size);
extern uint32_t VerifySignature(uint8_t is224, uint8_t *hash, uint8_t *ecsda, uint8_t *pubKey);
PLAT_BL_SCT_ZI static uint8_t Output[OUTDATA_BYTE];
ImageHead GImageHead;
uint32_t VerifyImageHead(void)
{
uint32_t TotalLen;
uint32_t RetValue = NoError;
memset(Output, 0, OUTDATA_BYTE);
ImageHead *pImgHd = (ImageHead *)IMG_HEAD_LOAD_ADDR;
MwAalSha256Ctx_t sha256Cxt;
#ifdef VERIFY_STATISTIC
uint32_t StartTime, EndTime, DiffTime;
StartTime = SysTick_Get_CurrentVal();
#endif
//skip verify when security is not enabled and type is not match
if((GetBRInfo()->SecureBootEnabled == 0)&&((GImageHead.Type&0xff)==SHA256_NONE))
{
//to be fixed
#ifdef VERIFY_STATISTIC
BL_TRACE("VerifyImageHead skip\r\n");
#endif
return RetValue;
}
memset(&pImgHd->HashIH[0], 0, sizeof(pImgHd->HashIH));
TotalLen = sizeof(ImageHead);
mwAalInitSha256(&sha256Cxt, 1);
//TotalLen < max_sha_segment_len (64k -1 )
RetValue = mwAalUpdateSha256(&sha256Cxt, (uint8_t*)pImgHd, Output, TotalLen, 1);
if (RetValue !=0)
{
return RetValue;
}
#if 0
BL_TRACE("VerifyImageHead Output:\n");
for(int i=0; i<OUTDATA_BYTE; i++)
{
BL_TRACE("0x%x,",Output[i]);
}
BL_TRACE("\n");
#endif
if (memcmp(&GImageHead.HashIH[0], &Output[0], sizeof(GImageHead.HashIH))!= 0)
{
BL_TRACE("GImageHead.HashIH not match\r\n");
RetValue = InvalidHeadKeyHashError;
}
#ifdef VERIFY_STATISTIC
EndTime = SysTick_Get_CurrentVal();
DiffTime = StartTime - EndTime;
DiffTime = DiffTime*1000/32768;
BL_TRACE("sha256_data(len=%d), Time(ms)->%d.\r\n", (int)TotalLen, (int)DiffTime);
#endif
return RetValue;
}
uint32_t LoadVerifyImageHead(void)
{
uint32_t RetValue;
#ifdef VERIFY_STATISTIC
uint32_t StartTime, EndTime, DiffTime;
StartTime = SysTick_Get_CurrentVal();
#endif
//load system img head
RetValue = FLASH_XIPRead((uint8_t*)IMG_HEAD_LOAD_ADDR, AP_HEAD_FLASH_OFFSET_ADDR, sizeof(GImageHead));
if (RetValue != QSPI_OK)
{
BL_TRACE("LoadVerifyImageHead FLASH_XIPRead return %d.\r\n", RetValue);
RetValue = SpiReadErr;
return RetValue;
}
memcpy((uint8_t*)&GImageHead, (uint8_t*)IMG_HEAD_LOAD_ADDR, sizeof(GImageHead));
#ifdef VERIFY_STATISTIC
EndTime = SysTick_Get_CurrentVal();
DiffTime = StartTime - EndTime;
DiffTime = DiffTime*1000/32768;
BL_TRACE("LoadVerifyImageHead read(len=%d), Time(ms)->%d.\r\n", (int)(sizeof(GImageHead) + GImageHead.RsvArea.ReservedSize), (int)DiffTime);
#endif
#if 0
BL_TRACE("GImageHead->HashIH:\n");
for(int i=0; i<OUTDATA_BYTE; i++)
{
BL_TRACE("0x%x,",GImageHead.HashIH[i]);
}
BL_TRACE("\n");
uint8_t* head2 = (uint8_t*)IMG_HEAD_LOAD_ADDR;
BL_TRACE("system image head(0x%x):\n", AP_HEAD_FLASH_OFFSET_ADDR);
for(int j=0; j<17; j++){
for(int i=0; i<16; i++)
{
BL_TRACE("0x%x,",head2[i+16*j]);
}
BL_TRACE("\n");
}
#endif
RetValue = VerifyImageHead();
if (RetValue!=NoError)
{
BL_TRACE("verify image head failed!!!");
}
else
{
BL_TRACE("verify image head success\n");
}
return RetValue;
}
uint32_t VerifyImageBodySignature(uint8_t is224, uint8_t *hash, uint8_t *ecsda)
{
return VerifySignature(is224, hash, ecsda, GetVerifyPubKey());
}
uint32_t VerifyImageBody(void)
{
uint32_t RetValue = NoError;
#ifdef VERIFY_STATISTIC
uint32_t StartTime, EndTime, DiffTime;
StartTime = SysTick_Get_CurrentVal();
#endif
//uint8_t signkey[56] = {0xfc,0x81,0x2d,0x68,0x16,0xd8,0xeb,0x9c,0xb2,0x47,0x39,0xf1,0xa1,0xa3,0xc9,0x56,0xe8,0xb4,0x76,0x34,0xe6,0xd6,0x7c,0xc6,0xd4,0x81,0xb8,
// 0x26,0xea,0x6a,0x36,0x3e,0xbe,0x3b,0xb8,0x44,0x78,0x4f,0x29,0x7f,0x27,0xb8,0xcb,0xf,0x8c,0x9f,0xa0,0x8,0xe7,0xda,0xc6,0x7a,0x86,0x74,0xe6,0x4c};
//memcpy(GImageHead.ImgBodyInfo.ECDSASign, signkey, 56);
if(NoError != (RetValue = VerifyImageBodySignature(1, GImageHead.ImgBodyInfo.Hash, GImageHead.ImgBodyInfo.ECDSASign))) return RetValue;
#ifdef VERIFY_STATISTIC
EndTime = SysTick_Get_CurrentVal();
DiffTime = StartTime - EndTime;
DiffTime = DiffTime*1000/32768;
BL_TRACE("uECC_verify Time(ms)->%d.\n", (int)DiffTime);
#endif
//BL_TRACE("VerifyImageBody succ.\n");
return RetValue;
}
uint32_t LoadVerifyImageBody(void)
{
uint32_t RetValue = NoError;
uint32_t Offset = 0;
uint32_t RemainLen;
uint32_t leftLen = 0, fillLen = 0;
memset(Output, 0, OUTDATA_BYTE);
#ifdef VERIFY_STATISTIC
uint32_t StartTime, EndTime, DiffTime;
StartTime = SysTick_Get_CurrentVal();
#endif
MwAalSha256Ctx_t sha256Cxt;
#define SHA_BLOCK_SIZE 0x0c000 // 48k < max_sha_segment_len (64k -1 )
//skip verify when security is not enabled
if((GetBRInfo()->SecureBootEnabled == 0)&&((GImageHead.Type&0xff)==SHA256_NONE))
{
//to be fixed
BL_TRACE("VerifyImageBody sha256 skip\n");
return RetValue;
}
if (GImageHead.ImgBodyInfo.ApImageSze > AP_BODY_MAX_SIZE)
{
return ImageToBigError;
}
mwAalInitSha256(&sha256Cxt, 1);
//GImageHead.ImgBodyInfo.ApImageSze = 2121932;//for test
BL_TRACE("LoadVerifyImageBody ApImageSze=%d\n", GImageHead.ImgBodyInfo.ApImageSze);
RemainLen = GImageHead.ImgBodyInfo.ApImageSze;
for (Offset = 0; Offset < GImageHead.ImgBodyInfo.ApImageSze; Offset+=SHA_BLOCK_SIZE)
{
if (RemainLen > SHA_BLOCK_SIZE)
{
RemainLen -= SHA_BLOCK_SIZE;
RetValue = FLASH_XIPRead((uint8_t*)IMG_BODY_LOAD_ADDR , AP_BODY_FLASH_OFFSET_ADDR+Offset, SHA_BLOCK_SIZE);
if (RetValue != QSPI_OK)
{
return RetValue;
}
RetValue = mwAalUpdateSha256(&sha256Cxt, (uint8_t*)IMG_BODY_LOAD_ADDR, Output, SHA_BLOCK_SIZE, 0);
if (RetValue !=0)
{
return InvalidBodyKeyHashError;
}
}
else
{
BL_TRACE("LoadVerifyImageBody::RemainLen=0x%x\r\n", RemainLen);
leftLen = RemainLen & 0x3F;
if(leftLen != 0){
fillLen = 64 - leftLen;
RetValue = FLASH_XIPRead((uint8_t*)IMG_BODY_LOAD_ADDR , AP_BODY_FLASH_OFFSET_ADDR+Offset, RemainLen-leftLen);//calc ap image last alignment block
if (RetValue != QSPI_OK)
{
return RetValue;
}
RetValue = mwAalUpdateSha256(&sha256Cxt, (uint8_t*)IMG_BODY_LOAD_ADDR, Output, RemainLen-leftLen, 0);
if (RetValue != NoError)
{
return RetValue;
}
}else{
BL_TRACE("LoadVerifyImageBody::RemainLen 64 bytes alignment \r\n");
RetValue = FLASH_XIPRead((uint8_t*)IMG_BODY_LOAD_ADDR , AP_BODY_FLASH_OFFSET_ADDR+Offset, RemainLen);//ap image 64 alignment
if (RetValue != QSPI_OK)
{
return RetValue;
}
RetValue = mwAalUpdateSha256(&sha256Cxt, (uint8_t*)IMG_BODY_LOAD_ADDR, Output, RemainLen, 0);
if (RetValue != NoError)
{
return RetValue;
}
}
break;
}
}
if(leftLen != 0){
RetValue = FLASH_XIPRead((uint8_t*)IMG_BODY_LOAD_ADDR , AP_BODY_FLASH_OFFSET_ADDR+Offset+RemainLen-leftLen, leftLen);//read ap image leftlen to buffer
if (RetValue != QSPI_OK)
{
return RetValue;
}
}
//GImageHead.ImgBodyInfo.CpImageSze = 449184;//for test
BL_TRACE("LoadVerifyImageBody CpImageSze=%d\n", GImageHead.ImgBodyInfo.CpImageSze);
RemainLen = GImageHead.ImgBodyInfo.CpImageSze;
#if (defined CHIP_EC618)
CPXIP_Enable();
#elif (defined TYPE_EC718H)
CPFLASH_xipInit();
#endif
if(leftLen != 0){
RemainLen -= fillLen;
#ifdef TYPE_EC718H
RetValue = CPFLASH_read((uint8_t*)IMG_BODY_LOAD_ADDR+leftLen , CP_BODY_FLASH_OFFSET_ADDR, fillLen); //read cp image filllen to buffer
#else//share ap flash
RetValue = FLASH_XIPRead((uint8_t*)IMG_BODY_LOAD_ADDR+leftLen , CP_BODY_FLASH_OFFSET_ADDR, fillLen); //read cp image filllen to buffer
#endif
if (RetValue != QSPI_OK)
{
return RetValue;
}
RetValue = mwAalUpdateSha256(&sha256Cxt, (uint8_t*)IMG_BODY_LOAD_ADDR, Output, 64, 0);
if (RetValue !=0)
{
return InvalidBodyKeyHashError;
}
}
for (Offset = fillLen; Offset < GImageHead.ImgBodyInfo.CpImageSze; Offset+=SHA_BLOCK_SIZE)
{
if (RemainLen > SHA_BLOCK_SIZE)
{
RemainLen -= SHA_BLOCK_SIZE;
#ifdef TYPE_EC718H
RetValue = CPFLASH_read((uint8_t*)IMG_BODY_LOAD_ADDR , CP_BODY_FLASH_OFFSET_ADDR+Offset, SHA_BLOCK_SIZE);
#else//share ap flash
RetValue = FLASH_XIPRead((uint8_t*)IMG_BODY_LOAD_ADDR , CP_BODY_FLASH_OFFSET_ADDR+Offset, SHA_BLOCK_SIZE);
#endif
if (RetValue != QSPI_OK)
{
return RetValue;
}
RetValue = mwAalUpdateSha256(&sha256Cxt, (uint8_t*)IMG_BODY_LOAD_ADDR, Output, SHA_BLOCK_SIZE, 0);
if (RetValue !=0)
{
return InvalidBodyKeyHashError;
}
}
else
{
#ifdef TYPE_EC718H
RetValue = CPFLASH_read((uint8_t*)IMG_BODY_LOAD_ADDR , CP_BODY_FLASH_OFFSET_ADDR+Offset, RemainLen);
#else//share ap flash
RetValue = FLASH_XIPRead((uint8_t*)IMG_BODY_LOAD_ADDR , CP_BODY_FLASH_OFFSET_ADDR+Offset, RemainLen);
#endif
if (RetValue != QSPI_OK)
{
return RetValue;
}
RetValue = mwAalUpdateSha256(&sha256Cxt, (uint8_t*)IMG_BODY_LOAD_ADDR, Output, RemainLen, 1);
if (RetValue != NoError)
{
return RetValue;
}
break;
}
}
mwAalDeinitSha256(&sha256Cxt);
//uint8_t hash[28] = {0x51,0x3f,0x53,0x24,0x43,0x7c,0xd,0xa1,0x4c,0x7b,0x9b,0xe4,0x52,0x83,0x8d,0x9b,0xcf,0x8e,0xdd,0xf7,0x23,0x35,0x74,0x5e,0x9b,0xa4,0xae,0xcc};//for test
//memcpy(GImageHead.ImgBodyInfo.Hash, hash, 28);//for test
//#if 0
BL_TRACE("ImgBodyInfo.Hash:\n");
for(int i=0; i<OUTDATA_BYTE; i++)
{
BL_TRACE("0x%x,",GImageHead.ImgBodyInfo.Hash[i]);
}
BL_TRACE("\n");
BL_TRACE("LoadVerifyImageBody Output:\n");
for(int i=0; i<OUTDATA_BYTE; i++)
{
BL_TRACE("0x%x,",Output[i]);
}
BL_TRACE("\n");
//#endif
if (memcmp(&GImageHead.ImgBodyInfo.Hash[0], &Output[0], sizeof(GImageHead.ImgBodyInfo.Hash)) != 0)
{
BL_TRACE("Verify hash mismatch!!!!!!!!!!\n");
return InvalidBodyKeyHashError;
}
#ifdef VERIFY_STATISTIC
EndTime = SysTick_Get_CurrentVal();
DiffTime = StartTime - EndTime;
DiffTime = DiffTime*1000/32768;
BL_TRACE("sha224_data(aplen=%d,cplen=%d), Time(ms)->%d.\r\n", (int)(GImageHead.ImgBodyInfo.ApImageSze), (int)(GImageHead.ImgBodyInfo.CpImageSze),(int)DiffTime);
#endif
if(GetBRInfo()->SecureBootEnabled)
{
BL_TRACE("secure bit enable to verify image\n");
RetValue = VerifyImageBody();
if (RetValue !=0)
{
return RetValue;
}
}
return RetValue;
}

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@ -1,263 +0,0 @@
/**
* \file sha256.h
*
* \brief This file contains SHA-224 and SHA-256 definitions and functions.
*
* The Secure Hash Algorithms 224 and 256 (SHA-224 and SHA-256) cryptographic
* hash functions are defined in <em>FIPS 180-4: Secure Hash Standard (SHS)</em>.
*/
/*
* Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* This file is part of Mbed TLS (https://tls.mbed.org)
*/
#ifndef MBEDTLS_SHA256_H
#define MBEDTLS_SHA256_H
#if 0
#if !defined(MBEDTLS_CONFIG_FILE)
#include "config.h"
#else
#include MBEDTLS_CONFIG_FILE
#endif
#endif
#include <stddef.h>
#include <stdint.h>
//to be fixed
//#define MBEDTLS_SELF_TEST
#define nSHA256_OUTDATA_BYTE 32 // 256bit 16byte
#define nSHA224_OUTDATA_BYTE 28 // 224bit 16byte
#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED -0x0037 /**< SHA-256 hardware accelerator failed */
#define MBEDTLS_SHA256_SMALLER
#ifdef __cplusplus
extern "C" {
#endif
// Regular implementation
//
/**
* \brief The SHA-256 context structure.
*
* The structure is used both for SHA-256 and for SHA-224
* checksum calculations. The choice between these two is
* made in the call to mbedtls_sha256_starts_ret().
*/
typedef struct
{
uint32_t total[2]; /*!< The number of Bytes processed. */
uint32_t state[8]; /*!< The intermediate digest state. */
unsigned char buffer[64]; /*!< The data block being processed. */
int is224; /*!< Determines which function to use:
0: Use SHA-256, or 1: Use SHA-224. */
}
mbedtls_sha256_context;
/**
* \brief This function initializes a SHA-256 context.
*
* \param ctx The SHA-256 context to initialize.
*/
void mbedtls_sha256_init( mbedtls_sha256_context *ctx );
/**
* \brief This function clears a SHA-256 context.
*
* \param ctx The SHA-256 context to clear.
*/
void mbedtls_sha256_free( mbedtls_sha256_context *ctx );
/**
* \brief This function clones the state of a SHA-256 context.
*
* \param dst The destination context.
* \param src The context to clone.
*/
void mbedtls_sha256_clone( mbedtls_sha256_context *dst,
const mbedtls_sha256_context *src );
/**
* \brief This function starts a SHA-224 or SHA-256 checksum
* calculation.
*
* \param ctx The context to initialize.
* \param is224 Determines which function to use:
* 0: Use SHA-256, or 1: Use SHA-224.
*
* \return \c 0 on success.
*/
int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 );
/**
* \brief This function feeds an input buffer into an ongoing
* SHA-256 checksum calculation.
*
* \param ctx The SHA-256 context.
* \param input The buffer holding the data.
* \param ilen The length of the input data.
*
* \return \c 0 on success.
*/
int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx,
const unsigned char *input,
size_t ilen );
/**
* \brief This function finishes the SHA-256 operation, and writes
* the result to the output buffer.
*
* \param ctx The SHA-256 context.
* \param output The SHA-224 or SHA-256 checksum result.
*
* \return \c 0 on success.
*/
int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx,
unsigned char output[32] );
/**
* \brief This function processes a single data block within
* the ongoing SHA-256 computation. This function is for
* internal use only.
*
* \param ctx The SHA-256 context.
* \param data The buffer holding one block of data.
*
* \return \c 0 on success.
*/
int mbedtls_internal_sha256_process( mbedtls_sha256_context *ctx,
const unsigned char data[64] );
#define MBEDTLS_DEPRECATED
/**
* \brief This function starts a SHA-224 or SHA-256 checksum
* calculation.
*
*
* \deprecated Superseded by mbedtls_sha256_starts_ret() in 2.7.0.
*
* \param ctx The context to initialize.
* \param is224 Determines which function to use:
* 0: Use SHA-256, or 1: Use SHA-224.
*/
MBEDTLS_DEPRECATED void mbedtls_sha256_starts( mbedtls_sha256_context *ctx,
int is224 );
/**
* \brief This function feeds an input buffer into an ongoing
* SHA-256 checksum calculation.
*
* \deprecated Superseded by mbedtls_sha256_update_ret() in 2.7.0.
*
* \param ctx The SHA-256 context to initialize.
* \param input The buffer holding the data.
* \param ilen The length of the input data.
*/
MBEDTLS_DEPRECATED void mbedtls_sha256_update( mbedtls_sha256_context *ctx,
const unsigned char *input,
size_t ilen );
/**
* \brief This function finishes the SHA-256 operation, and writes
* the result to the output buffer.
*
* \deprecated Superseded by mbedtls_sha256_finish_ret() in 2.7.0.
*
* \param ctx The SHA-256 context.
* \param output The SHA-224 or SHA-256 checksum result.
*/
MBEDTLS_DEPRECATED void mbedtls_sha256_finish( mbedtls_sha256_context *ctx,
unsigned char output[32] );
/**
* \brief This function processes a single data block within
* the ongoing SHA-256 computation. This function is for
* internal use only.
*
* \deprecated Superseded by mbedtls_internal_sha256_process() in 2.7.0.
*
* \param ctx The SHA-256 context.
* \param data The buffer holding one block of data.
*/
MBEDTLS_DEPRECATED void mbedtls_sha256_process( mbedtls_sha256_context *ctx,
const unsigned char data[64] );
#undef MBEDTLS_DEPRECATED
/**
* \brief This function calculates the SHA-224 or SHA-256
* checksum of a buffer.
*
* The function allocates the context, performs the
* calculation, and frees the context.
*
* The SHA-256 result is calculated as
* output = SHA-256(input buffer).
*
* \param input The buffer holding the input data.
* \param ilen The length of the input data.
* \param output The SHA-224 or SHA-256 checksum result.
* \param is224 Determines which function to use:
* 0: Use SHA-256, or 1: Use SHA-224.
*/
int mbedtls_sha256_ret( const unsigned char *input,
size_t ilen,
unsigned char output[32],
int is224 );
#define MBEDTLS_DEPRECATED
/**
* \brief This function calculates the SHA-224 or SHA-256 checksum
* of a buffer.
*
* The function allocates the context, performs the
* calculation, and frees the context.
*
* The SHA-256 result is calculated as
* output = SHA-256(input buffer).
*
* \deprecated Superseded by mbedtls_sha256_ret() in 2.7.0.
*
* \param input The buffer holding the data.
* \param ilen The length of the input data.
* \param output The SHA-224 or SHA-256 checksum result.
* \param is224 Determines which function to use:
* 0: Use SHA-256, or 1: Use SHA-224.
*/
MBEDTLS_DEPRECATED void mbedtls_sha256( const unsigned char *input,
size_t ilen,
unsigned char output[32],
int is224 );
#undef MBEDTLS_DEPRECATED
/**
* \brief The SHA-224 and SHA-256 checkup routine.
*
* \return \c 0 on success.
* \return \c 1 on failure.
*/
int mbedtls_sha256_self_test( int verbose );
#ifdef __cplusplus
}
#endif
#endif /* mbedtls_sha256.h */

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@ -1,529 +0,0 @@
/*
* FIPS-180-2 compliant SHA-256 implementation
*
* Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* This file is part of mbed TLS (https://tls.mbed.org)
*/
/*
* The SHA-256 Secure Hash Standard was published by NIST in 2002.
*
* http://csrc.nist.gov/publications/fips/fips180-2/fips180-2.pdf
*/
#define MBEDTLS_SHA256_C
#if defined(MBEDTLS_SHA256_C)
#include "sha256.h"
#include <string.h>
#if defined(MBEDTLS_SELF_TEST)
uint8_t gbuf[1024];
#endif /* MBEDTLS_SELF_TEST */
#define mbedtls_printf()
/* Implementation that should never be optimized out by the compiler */
static void mbedtls_zeroize( void *v, size_t n ) {
volatile unsigned char *p = v; while( n-- ) *p++ = 0;
}
/*
* 32-bit integer manipulation macros (big endian)
*/
#ifndef GET_UINT32_BE
#define GET_UINT32_BE(n,b,i) \
do { \
(n) = ( (uint32_t) (b)[(i) ] << 24 ) \
| ( (uint32_t) (b)[(i) + 1] << 16 ) \
| ( (uint32_t) (b)[(i) + 2] << 8 ) \
| ( (uint32_t) (b)[(i) + 3] ); \
} while( 0 )
#endif
#ifndef PUT_UINT32_BE
#define PUT_UINT32_BE(n,b,i) \
do { \
(b)[(i) ] = (unsigned char) ( (n) >> 24 ); \
(b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \
(b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \
(b)[(i) + 3] = (unsigned char) ( (n) ); \
} while( 0 )
#endif
void mbedtls_sha256_init( mbedtls_sha256_context *ctx )
{
memset( ctx, 0, sizeof( mbedtls_sha256_context ) );
}
void mbedtls_sha256_free( mbedtls_sha256_context *ctx )
{
if( ctx == NULL )
return;
mbedtls_zeroize( ctx, sizeof( mbedtls_sha256_context ) );
}
void mbedtls_sha256_clone( mbedtls_sha256_context *dst,
const mbedtls_sha256_context *src )
{
*dst = *src;
}
/*
* SHA-256 context setup
*/
int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 )
{
ctx->total[0] = 0;
ctx->total[1] = 0;
if( is224 == 0 )
{
/* SHA-256 */
ctx->state[0] = 0x6A09E667;
ctx->state[1] = 0xBB67AE85;
ctx->state[2] = 0x3C6EF372;
ctx->state[3] = 0xA54FF53A;
ctx->state[4] = 0x510E527F;
ctx->state[5] = 0x9B05688C;
ctx->state[6] = 0x1F83D9AB;
ctx->state[7] = 0x5BE0CD19;
}
else
{
/* SHA-224 */
ctx->state[0] = 0xC1059ED8;
ctx->state[1] = 0x367CD507;
ctx->state[2] = 0x3070DD17;
ctx->state[3] = 0xF70E5939;
ctx->state[4] = 0xFFC00B31;
ctx->state[5] = 0x68581511;
ctx->state[6] = 0x64F98FA7;
ctx->state[7] = 0xBEFA4FA4;
}
ctx->is224 = is224;
return( 0 );
}
void mbedtls_sha256_starts( mbedtls_sha256_context *ctx,
int is224 )
{
mbedtls_sha256_starts_ret( ctx, is224 );
}
static const uint32_t K[] =
{
0x428A2F98, 0x71374491, 0xB5C0FBCF, 0xE9B5DBA5,
0x3956C25B, 0x59F111F1, 0x923F82A4, 0xAB1C5ED5,
0xD807AA98, 0x12835B01, 0x243185BE, 0x550C7DC3,
0x72BE5D74, 0x80DEB1FE, 0x9BDC06A7, 0xC19BF174,
0xE49B69C1, 0xEFBE4786, 0x0FC19DC6, 0x240CA1CC,
0x2DE92C6F, 0x4A7484AA, 0x5CB0A9DC, 0x76F988DA,
0x983E5152, 0xA831C66D, 0xB00327C8, 0xBF597FC7,
0xC6E00BF3, 0xD5A79147, 0x06CA6351, 0x14292967,
0x27B70A85, 0x2E1B2138, 0x4D2C6DFC, 0x53380D13,
0x650A7354, 0x766A0ABB, 0x81C2C92E, 0x92722C85,
0xA2BFE8A1, 0xA81A664B, 0xC24B8B70, 0xC76C51A3,
0xD192E819, 0xD6990624, 0xF40E3585, 0x106AA070,
0x19A4C116, 0x1E376C08, 0x2748774C, 0x34B0BCB5,
0x391C0CB3, 0x4ED8AA4A, 0x5B9CCA4F, 0x682E6FF3,
0x748F82EE, 0x78A5636F, 0x84C87814, 0x8CC70208,
0x90BEFFFA, 0xA4506CEB, 0xBEF9A3F7, 0xC67178F2,
};
#define SHR(x,n) ((x & 0xFFFFFFFF) >> n)
#define ROTR(x,n) (SHR(x,n) | (x << (32 - n)))
#define S0(x) (ROTR(x, 7) ^ ROTR(x,18) ^ SHR(x, 3))
#define S1(x) (ROTR(x,17) ^ ROTR(x,19) ^ SHR(x,10))
#define S2(x) (ROTR(x, 2) ^ ROTR(x,13) ^ ROTR(x,22))
#define S3(x) (ROTR(x, 6) ^ ROTR(x,11) ^ ROTR(x,25))
#define F0(x,y,z) ((x & y) | (z & (x | y)))
#define F1(x,y,z) (z ^ (x & (y ^ z)))
#define R(t) \
( \
W[t] = S1(W[t - 2]) + W[t - 7] + \
S0(W[t - 15]) + W[t - 16] \
)
#define P(a,b,c,d,e,f,g,h,x,K) \
{ \
temp1 = h + S3(e) + F1(e,f,g) + K + x; \
temp2 = S2(a) + F0(a,b,c); \
d += temp1; h = temp1 + temp2; \
}
int mbedtls_internal_sha256_process( mbedtls_sha256_context *ctx,
const unsigned char data[64] )
{
uint32_t temp1, temp2, W[64];
uint32_t A[8];
unsigned int i;
for( i = 0; i < 8; i++ )
A[i] = ctx->state[i];
#if defined(MBEDTLS_SHA256_SMALLER)
for( i = 0; i < 64; i++ )
{
if( i < 16 )
GET_UINT32_BE( W[i], data, 4 * i );
else
R( i );
P( A[0], A[1], A[2], A[3], A[4], A[5], A[6], A[7], W[i], K[i] );
temp1 = A[7]; A[7] = A[6]; A[6] = A[5]; A[5] = A[4]; A[4] = A[3];
A[3] = A[2]; A[2] = A[1]; A[1] = A[0]; A[0] = temp1;
}
#else /* MBEDTLS_SHA256_SMALLER */
for( i = 0; i < 16; i++ )
GET_UINT32_BE( W[i], data, 4 * i );
for( i = 0; i < 16; i += 8 )
{
P( A[0], A[1], A[2], A[3], A[4], A[5], A[6], A[7], W[i+0], K[i+0] );
P( A[7], A[0], A[1], A[2], A[3], A[4], A[5], A[6], W[i+1], K[i+1] );
P( A[6], A[7], A[0], A[1], A[2], A[3], A[4], A[5], W[i+2], K[i+2] );
P( A[5], A[6], A[7], A[0], A[1], A[2], A[3], A[4], W[i+3], K[i+3] );
P( A[4], A[5], A[6], A[7], A[0], A[1], A[2], A[3], W[i+4], K[i+4] );
P( A[3], A[4], A[5], A[6], A[7], A[0], A[1], A[2], W[i+5], K[i+5] );
P( A[2], A[3], A[4], A[5], A[6], A[7], A[0], A[1], W[i+6], K[i+6] );
P( A[1], A[2], A[3], A[4], A[5], A[6], A[7], A[0], W[i+7], K[i+7] );
}
for( i = 16; i < 64; i += 8 )
{
P( A[0], A[1], A[2], A[3], A[4], A[5], A[6], A[7], R(i+0), K[i+0] );
P( A[7], A[0], A[1], A[2], A[3], A[4], A[5], A[6], R(i+1), K[i+1] );
P( A[6], A[7], A[0], A[1], A[2], A[3], A[4], A[5], R(i+2), K[i+2] );
P( A[5], A[6], A[7], A[0], A[1], A[2], A[3], A[4], R(i+3), K[i+3] );
P( A[4], A[5], A[6], A[7], A[0], A[1], A[2], A[3], R(i+4), K[i+4] );
P( A[3], A[4], A[5], A[6], A[7], A[0], A[1], A[2], R(i+5), K[i+5] );
P( A[2], A[3], A[4], A[5], A[6], A[7], A[0], A[1], R(i+6), K[i+6] );
P( A[1], A[2], A[3], A[4], A[5], A[6], A[7], A[0], R(i+7), K[i+7] );
}
#endif /* MBEDTLS_SHA256_SMALLER */
for( i = 0; i < 8; i++ )
ctx->state[i] += A[i];
return( 0 );
}
void mbedtls_sha256_process( mbedtls_sha256_context *ctx,
const unsigned char data[64] )
{
mbedtls_internal_sha256_process( ctx, data );
}
/*
* SHA-256 process buffer
*/
int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx,
const unsigned char *input,
size_t ilen )
{
int ret;
size_t fill;
uint32_t left;
if( ilen == 0 )
return( 0 );
left = ctx->total[0] & 0x3F;
fill = 64 - left;
ctx->total[0] += (uint32_t) ilen;
ctx->total[0] &= 0xFFFFFFFF;
if( ctx->total[0] < (uint32_t) ilen )
ctx->total[1]++;
if( left && ilen >= fill )
{
memcpy( (void *) (ctx->buffer + left), input, fill );
if( ( ret = mbedtls_internal_sha256_process( ctx, ctx->buffer ) ) != 0 )
return( ret );
input += fill;
ilen -= fill;
left = 0;
}
while( ilen >= 64 )
{
if( ( ret = mbedtls_internal_sha256_process( ctx, input ) ) != 0 )
return( ret );
input += 64;
ilen -= 64;
}
if( ilen > 0 )
memcpy( (void *) (ctx->buffer + left), input, ilen );
return( 0 );
}
void mbedtls_sha256_update( mbedtls_sha256_context *ctx,
const unsigned char *input,
size_t ilen )
{
mbedtls_sha256_update_ret( ctx, input, ilen );
}
static const unsigned char sha256_padding[64] =
{
0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
/*
* SHA-256 final digest
*/
int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx,
unsigned char output[32] )
{
int ret;
uint32_t last, padn;
uint32_t high, low;
unsigned char msglen[8];
high = ( ctx->total[0] >> 29 )
| ( ctx->total[1] << 3 );
low = ( ctx->total[0] << 3 );
PUT_UINT32_BE( high, msglen, 0 );
PUT_UINT32_BE( low, msglen, 4 );
last = ctx->total[0] & 0x3F;
padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last );
if( ( ret = mbedtls_sha256_update_ret( ctx, sha256_padding, padn ) ) != 0 )
return( ret );
if( ( ret = mbedtls_sha256_update_ret( ctx, msglen, 8 ) ) != 0 )
return( ret );
PUT_UINT32_BE( ctx->state[0], output, 0 );
PUT_UINT32_BE( ctx->state[1], output, 4 );
PUT_UINT32_BE( ctx->state[2], output, 8 );
PUT_UINT32_BE( ctx->state[3], output, 12 );
PUT_UINT32_BE( ctx->state[4], output, 16 );
PUT_UINT32_BE( ctx->state[5], output, 20 );
PUT_UINT32_BE( ctx->state[6], output, 24 );
if( ctx->is224 == 0 )
PUT_UINT32_BE( ctx->state[7], output, 28 );
return( 0 );
}
void mbedtls_sha256_finish( mbedtls_sha256_context *ctx,
unsigned char output[32] )
{
mbedtls_sha256_finish_ret( ctx, output );
}
/*
* output = SHA-256( input buffer )
*/
int mbedtls_sha256_ret( const unsigned char *input,
size_t ilen,
unsigned char output[32],
int is224 )
{
int ret;
mbedtls_sha256_context ctx;
mbedtls_sha256_init( &ctx );
if( ( ret = mbedtls_sha256_starts_ret( &ctx, is224 ) ) != 0 )
goto exit;
if( ( ret = mbedtls_sha256_update_ret( &ctx, input, ilen ) ) != 0 )
goto exit;
if( ( ret = mbedtls_sha256_finish_ret( &ctx, output ) ) != 0 )
goto exit;
exit:
mbedtls_sha256_free( &ctx );
return( ret );
}
void mbedtls_sha256( const unsigned char *input,
size_t ilen,
unsigned char output[32],
int is224 )
{
mbedtls_sha256_ret( input, ilen, output, is224 );
}
#if defined(MBEDTLS_SELF_TEST)
/*
* FIPS-180-2 test vectors
*/
static const unsigned char sha256_test_buf[3][57] =
{
{ "abc" },
{ "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" },
{ "" }
};
static const size_t sha256_test_buflen[3] =
{
3, 56, 1000
};
static const unsigned char sha256_test_sum[6][32] =
{
/*
* SHA-224 test vectors
*/
{ 0x23, 0x09, 0x7D, 0x22, 0x34, 0x05, 0xD8, 0x22,
0x86, 0x42, 0xA4, 0x77, 0xBD, 0xA2, 0x55, 0xB3,
0x2A, 0xAD, 0xBC, 0xE4, 0xBD, 0xA0, 0xB3, 0xF7,
0xE3, 0x6C, 0x9D, 0xA7 },
{ 0x75, 0x38, 0x8B, 0x16, 0x51, 0x27, 0x76, 0xCC,
0x5D, 0xBA, 0x5D, 0xA1, 0xFD, 0x89, 0x01, 0x50,
0xB0, 0xC6, 0x45, 0x5C, 0xB4, 0xF5, 0x8B, 0x19,
0x52, 0x52, 0x25, 0x25 },
{ 0x20, 0x79, 0x46, 0x55, 0x98, 0x0C, 0x91, 0xD8,
0xBB, 0xB4, 0xC1, 0xEA, 0x97, 0x61, 0x8A, 0x4B,
0xF0, 0x3F, 0x42, 0x58, 0x19, 0x48, 0xB2, 0xEE,
0x4E, 0xE7, 0xAD, 0x67 },
/*
* SHA-256 test vectors
*/
{ 0xBA, 0x78, 0x16, 0xBF, 0x8F, 0x01, 0xCF, 0xEA,
0x41, 0x41, 0x40, 0xDE, 0x5D, 0xAE, 0x22, 0x23,
0xB0, 0x03, 0x61, 0xA3, 0x96, 0x17, 0x7A, 0x9C,
0xB4, 0x10, 0xFF, 0x61, 0xF2, 0x00, 0x15, 0xAD },
{ 0x24, 0x8D, 0x6A, 0x61, 0xD2, 0x06, 0x38, 0xB8,
0xE5, 0xC0, 0x26, 0x93, 0x0C, 0x3E, 0x60, 0x39,
0xA3, 0x3C, 0xE4, 0x59, 0x64, 0xFF, 0x21, 0x67,
0xF6, 0xEC, 0xED, 0xD4, 0x19, 0xDB, 0x06, 0xC1 },
{ 0xCD, 0xC7, 0x6E, 0x5C, 0x99, 0x14, 0xFB, 0x92,
0x81, 0xA1, 0xC7, 0xE2, 0x84, 0xD7, 0x3E, 0x67,
0xF1, 0x80, 0x9A, 0x48, 0xA4, 0x97, 0x20, 0x0E,
0x04, 0x6D, 0x39, 0xCC, 0xC7, 0x11, 0x2C, 0xD0 }
};
/*
* Checkup routine
*/
int mbedtls_sha256_self_test( int verbose )
{
int i, j, k, buflen, ret = 0;
unsigned char *buf;
unsigned char sha256sum[32];
mbedtls_sha256_context ctx;
#ifdef MEM_LIBC
buf = mbedtls_calloc( 1024, sizeof(unsigned char) );
if( NULL == buf )
{
if( verbose != 0 )
mbedtls_printf( "Buffer allocation failed\n" );
return( 1 );
}
#else
buf =&gbuf[0];
#endif
mbedtls_sha256_init( &ctx );
for( i = 0; i < 6; i++ )
{
j = i % 3;
k = i < 3;
//if( verbose != 0 )
// mbedtls_printf( " SHA-%d test #%d: ", 256 - k * 32, j + 1 );
if( ( ret = mbedtls_sha256_starts_ret( &ctx, k ) ) != 0 )
goto fail;
if( j == 2 )
{
memset( buf, 'a', buflen = 1000 );
for( j = 0; j < 1000; j++ )
{
ret = mbedtls_sha256_update_ret( &ctx, buf, buflen );
if( ret != 0 )
goto fail;
}
}
else
{
ret = mbedtls_sha256_update_ret( &ctx, sha256_test_buf[j],
sha256_test_buflen[j] );
if( ret != 0 )
goto fail;
}
if( ( ret = mbedtls_sha256_finish_ret( &ctx, sha256sum ) ) != 0 )
goto fail;
if( memcmp( sha256sum, sha256_test_sum[i], 32 - k * 4 ) != 0 )
{
ret = 1;
goto fail;
}
if( verbose != 0 )
mbedtls_printf( "passed\n" );
}
if( verbose != 0 )
mbedtls_printf( "\n" );
goto exit;
fail:
if( verbose != 0 )
mbedtls_printf( "failed\n" );
exit:
mbedtls_sha256_free( &ctx );
#ifdef MEM_LIBC
mbedtls_free( buf );
#endif
return( ret );
}
#endif /* MBEDTLS_SELF_TEST */
#endif /* MBEDTLS_SHA256_C */

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@ -1,226 +0,0 @@
#include <stdio.h>
#include <stdarg.h>
#include <string.h>
//#include "gpr.h"
#include "wdt.h"
#include "bl_bsp.h"
#ifndef T_USART
#define T_USART USART_TypeDef
#endif
#ifndef USART_0
#define USART_0 ((T_USART*)USART0_BASE_ADDR)
#endif
#ifndef USART_1
#define USART_1 ((T_USART*)USART1_BASE_ADDR)
#endif
#define EXCEPT_AUTO_REBOOT_FLAG 1
#ifndef EXCEPT_AUTO_REBOOT_FLAG
#define EXCEPT_AUTO_REBOOT_FLAG 0
#endif
#define USART_LSR_TX_EMPTY ((uint32_t)0x00000040)
void execpt_usart_divide_latch(T_USART *usart,unsigned int val)
{
#if 0
unsigned int rd_data = 0;
rd_data = usart->LCR;
rd_data = (rd_data&0xffffff7f )|(val <<7);
usart->LCR = rd_data;
#endif
}
void except_usart_divided(T_USART *usart,unsigned int dlh,unsigned int dll)
{
#if 0
execpt_usart_divide_latch(usart,1);
usart->DLH = dlh;
usart->DLL = dll;
execpt_usart_divide_latch(usart,0);
#endif
}
void except_usart_init(T_USART *usart)
{
#if 0
//uart pimux set up
//618 pad is same with 617, so also need to pull up, config 510
*((uint32_t *)0x4d06007C)=0x00000510;//RX, padAddr:31
*((uint32_t *)0x4d060080)=0x00000010;//TX, padAddr:32
except_usart_divided(usart,0,27);
//usart->EFCR = 0x700;
usart->IER = 0x0f;
usart->FCR = 0x51;
usart->LCR = 0x3;
usart->MFCR = 0x1;
#endif
}
void except_usart_send(T_USART *usart,uint16_t Data)
{
#if 0
usart->THR = (Data & (uint16_t)0x01FF);
#endif
}
int except_usart_is_txrdy(T_USART *usart)
{
#if 0
int bitstatus = 0;
if ( (usart->LSR & USART_LSR_TX_EMPTY) != 0)
{
bitstatus = 1;
}
else
{
bitstatus = 0;
}
return bitstatus;
#endif
return 0;
}
int except_fputc(int ch, FILE *f)
{
#if 0
unsigned int cnt =0;
except_usart_send(USART_0,(uint8_t) ch);
while (1)
{
if (except_usart_is_txrdy(USART_0) != 0)
{
//tx finish
break;
}
if (cnt > 70000)
{
//when timeout just return
break;
}
cnt++;
};
#endif
return (ch);
}
void except_trace(char*log,int len)
{
#if 0
int i;
for(i=0;i<len;i++)
{
except_fputc(*((char *)log+i),NULL);
}
#endif
}
void except_config_wdt(void)
{
#if 0
//when rx data received, do not reboot
#if (EXCEPT_AUTO_REBOOT_FLAG !=0)
//config wdt
BSP_WdtInit();
WDT_start();
#else
WDT_stop();
#endif
#endif
}
void exception_init(void)
{
#if 0
int i;
//reset uart0, 51M, 115200
#if 0
GPR_clockEnable(PCLK_UART0) ;
GPR_clockDisable(FCLK_UART0);
GPR_setClockSrc(FCLK_UART0, FCLK_UART0_SEL_51M);
GPR_clockEnable(FCLK_UART0);
GPR_swReset(RST_FCLK_UART0);
#endif
for(i=0;i<70000;i++)
{
}
except_usart_init(USART_0);
except_config_wdt();
except_trace("BL Exception called!\r\n", sizeof("BL Exception called!\r\n"));
#if (EXCEPT_AUTO_REBOOT_FLAG !=0)
except_trace("Waiting wdg reset!\r\n", sizeof("Waiting wdg reset!\r\n"));
#endif
#endif
}
#if defined(__CC_ARM)
__asm void CommonFault_Handler(void)
{
extern exception_init
PRESERVE8
push {lr}
ldr r0, =exception_init
blx r0
pop {lr}
bx lr
}
__asm void HardFault_Hook_Handler(void)
{
PRESERVE8
push {lr}
ldr r0, =CommonFault_Handler
blx r0
b .
nop
nop
}
#elif defined(__GNUC__)
// todo: fix me
void CommonFault_Handler(void)
{
asm volatile(
".extern exception_init\n\t"
"push {lr}\n\t"
"ldr r0, =exception_init\n\t"
"blx r0\n\t"
"pop {lr}\n\t"
"bx lr\n\t"
);
}
void HardFault_Hook_Handler(void)
{
asm volatile(
"push {lr}\n\t"
"ldr r0, =CommonFault_Handler\n\t"
"blx r0\n\t"
"b .\n\t"
"bx lr\n\t"
);
}
#endif

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@ -1,276 +0,0 @@
#ifndef __RTE_DEVICE_H
#define __RTE_DEVICE_H
/* Peripheral IO Mode Select, Must Configure First !!!
Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
*/
#define POLLING_MODE 0x1
#define DMA_MODE 0x2
#define IRQ_MODE 0x3
#define UNILOG_MODE 0x4
#define RTE_UART0_TX_IO_MODE POLLING_MODE
#define RTE_UART0_RX_IO_MODE POLLING_MODE
#define RTE_UART1_TX_IO_MODE POLLING_MODE
#define RTE_UART1_RX_IO_MODE POLLING_MODE
#define RTE_SPI0_IO_MODE DMA_MODE
#define RTE_SPI1_IO_MODE DMA_MODE
#define I2C0_INIT_MODE POLLING_MODE
#define I2C1_INIT_MODE POLLING_MODE
// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
#define RTE_I2C0 0
// { PAD_PIN31}, // 0 : gpio16 / 1 : UART1 RTS / 2: I2C0_SDA
// { PAD_PIN32}, // 0 : gpio17 / 1 : UART1 CTS / 2: I2C0_SCL
#define RTE_I2C0_SCL_BIT 32
#define RTE_I2C0_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C0_SDA_BIT 31
#define RTE_I2C0_SDA_FUNC PAD_MUX_ALT2
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C0_DMA_TX_EN 0
#define RTE_I2C0_DMA_TX_REQID DMA_REQUEST_I2C0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C0_DMA_RX_EN 0
#define RTE_I2C0_DMA_RX_REQID DMA_REQUEST_I2C0_RX
// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
#define RTE_I2C1 0
// { PAD_PIN20}, // 0 : gpio5 / 2 : I2C1 SCL
// { PAD_PIN19}, // 0 : gpio4 / 2 : I2C1 SDA
#define RTE_I2C1_SCL_BIT 20
#define RTE_I2C1_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C1_SDA_BIT 19
#define RTE_I2C1_SDA_FUNC PAD_MUX_ALT2
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C1_DMA_TX_EN 1
#define RTE_I2C1_DMA_TX_REQID DMA_REQUEST_I2C1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C1_DMA_RX_EN 1
#define RTE_I2C1_DMA_RX_REQID DMA_REQUEST_I2C1_RX
// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
// Configuration settings for Driver_USART0 in component ::Drivers:USART
#define RTE_UART0 1
#define RTE_UART0_CTS_PIN_EN 0
#define RTE_UART0_RTS_PIN_EN 0
#if defined CHIP_EC718
// { PAD_PIN42}, // 0 : gpio36 / 3 : UART0 RTSn
// { PAD_PIN43}, // 0 : gpio37 / 3 : UART0 CTSn
// { PAD_PIN31}, // 0 : gpio16 / 1 : UART0 RXD
// { PAD_PIN32}, // 0 : gpio17 / 1 : UART0 TXD
#define RTE_UART0_RTS_BIT 42
#define RTE_UART0_RTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_CTS_BIT 43
#define RTE_UART0_CTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_RX_BIT 31
#define RTE_UART0_RX_FUNC PAD_MUX_ALT1
#define RTE_UART0_TX_BIT 32
#define RTE_UART0_TX_FUNC PAD_MUX_ALT1
#elif defined CHIP_EC716
// { PAD_PIN14}, // 0 : gpio2 / 5 : UART0 RTSn
// { PAD_PIN15}, // 0 : gpio3 / 5 : UART0 CTSn
// { PAD_PIN18}, // 0 : gpio6 / 1 : UART0 RXD
// { PAD_PIN19}, // 0 : gpio7 / 1 : UART0 TXD
#define RTE_UART0_RTS_BIT 14
#define RTE_UART0_RTS_FUNC PAD_MUX_ALT5
#define RTE_UART0_CTS_BIT 15
#define RTE_UART0_CTS_FUNC PAD_MUX_ALT5
#define RTE_UART0_RX_BIT 18
#define RTE_UART0_RX_FUNC PAD_MUX_ALT1
#define RTE_UART0_TX_BIT 19
#define RTE_UART0_TX_FUNC PAD_MUX_ALT1
#endif
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_TX_REQID DMA_REQUEST_USART0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_RX_REQID DMA_REQUEST_USART0_RX
// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
// Configuration settings for Driver_USART1 in component ::Drivers:USART
#define RTE_UART1 1
#define RTE_UART1_CTS_PIN_EN 0
#define RTE_UART1_RTS_PIN_EN 0
#if defined CHIP_EC718
// { PAD_PIN27}, // 0 : gpio12 / 2 : UART1 RTS
// { PAD_PIN28}, // 0 : gpio13 / 2 : UART1 CTS
// { PAD_PIN33}, // 0 : gpio18 / 1 : UART1 RXD
// { PAD_PIN34}, // 0 : gpio19 / 1 : UART1 TXD
#define RTE_UART1_RTS_BIT 27
#define RTE_UART1_RTS_FUNC PAD_MUX_ALT2
#define RTE_UART1_CTS_BIT 28
#define RTE_UART1_CTS_FUNC PAD_MUX_ALT2
#define RTE_UART1_RX_BIT 33
#define RTE_UART1_RX_FUNC PAD_MUX_ALT1
#define RTE_UART1_TX_BIT 34
#define RTE_UART1_TX_FUNC PAD_MUX_ALT1
#elif defined CHIP_EC716
// { PAD_PIN16}, // 0 : gpio4 / 5 : UART1 RTS
// { PAD_PIN17}, // 0 : gpio5 / 5 : UART1 CTS
// { PAD_PIN20}, // 0 : gpio8 / 1 : UART1 RXD
// { PAD_PIN21}, // 0 : gpio9 / 1 : UART1 TXD
#define RTE_UART1_RTS_BIT 16
#define RTE_UART1_RTS_FUNC PAD_MUX_ALT5
#define RTE_UART1_CTS_BIT 17
#define RTE_UART1_CTS_FUNC PAD_MUX_ALT5
#define RTE_UART1_RX_BIT 20
#define RTE_UART1_RX_FUNC PAD_MUX_ALT1
#define RTE_UART1_TX_BIT 21
#define RTE_UART1_TX_FUNC PAD_MUX_ALT1
#endif
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_TX_REQID DMA_REQUEST_USART1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_RX_REQID DMA_REQUEST_USART1_RX
// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
// Configuration settings for Driver_USART2 in component ::Drivers:USART
#define RTE_UART2 0
// { PAD_PIN25}, // 0 : gpio10 / 3 : UART2 RXD
// { PAD_PIN26}, // 0 : gpio11 / 3 : UART2 TXD
#define RTE_UART2_RX_BIT 25
#define RTE_UART2_RX_FUNC PAD_MUX_ALT3
#define RTE_UART2_TX_BIT 26
#define RTE_UART2_TX_FUNC PAD_MUX_ALT3
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_TX_REQID DMA_REQUEST_USART2_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_RX_REQID DMA_REQUEST_USART2_RX
// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
#define RTE_SPI0 0
// { PAD_PIN23}, // 0 : gpio8 / 1 : SPI0 SSn
// { PAD_PIN24}, // 0 : gpio9 / 1 : SPI0 MOSI
// { PAD_PIN25}, // 0 : gpio10 / 1 : SPI0 MISO
// { PAD_PIN26}, // 0 : gpio11 / 1 : SPI0 SCLK
#define RTE_SPI0_SSN_BIT 23
#define RTE_SPI0_SSN_FUNC PAD_MUX_ALT1
#define RTE_SPI0_MOSI_BIT 24
#define RTE_SPI0_MOSI_FUNC PAD_MUX_ALT1
#define RTE_SPI0_MISO_BIT 25
#define RTE_SPI0_MISO_FUNC PAD_MUX_ALT1
#define RTE_SPI0_SCLK_BIT 26
#define RTE_SPI0_SCLK_FUNC PAD_MUX_ALT1
#define RTE_SPI0_SSN_GPIO_INSTANCE 0
#define RTE_SPI0_SSN_GPIO_INDEX 8
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_TX_REQID DMA_REQUEST_SPI0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_RX_REQID DMA_REQUEST_SPI0_RX
// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
#define RTE_SPI1 0
// { PAD_PIN27}, // 0 : gpio12 / 1 : SPI1 SSn
// { PAD_PIN28}, // 0 : gpio13 / 1 : SPI1 MOSI
// { PAD_PIN29}, // 0 : gpio14 / 1 : SPI1 MISO
// { PAD_PIN30}, // 0 : gpio15 / 1 : SPI1 SCLK
// { PAD_PIN31}, // 0 : gpio16 / 4 : SPI1 SSn1
#define RTE_SPI1_SSN_BIT 27
#define RTE_SPI1_SSN_FUNC PAD_MUX_ALT1
#define RTE_SPI1_MOSI_BIT 28
#define RTE_SPI1_MOSI_FUNC PAD_MUX_ALT1
#define RTE_SPI1_MISO_BIT 29
#define RTE_SPI1_MISO_FUNC PAD_MUX_ALT1
#define RTE_SPI1_SCLK_BIT 30
#define RTE_SPI1_SCLK_FUNC PAD_MUX_ALT1
#define RTE_SPI1_SSN_GPIO_INSTANCE 0
#define RTE_SPI1_SSN_GPIO_INDEX 12
#define RTE_SPI1_SSN1_BIT 31
#define RTE_SPI1_SSN1_FUNC PAD_MUX_ALT4
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_TX_REQID DMA_REQUEST_SPI1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_RX_REQID DMA_REQUEST_SPI1_RX
// PWM0 Controller [Driver_PWM0]
// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
#define RTE_PWM 1
#define EFUSE_INIT_MODE POLLING_MODE
#define L2CTLS_INIT_MODE POLLING_MODE
#define FLASH_BARE_RW_MODE 1
//bootloader do not use log in ic
#define IC_PHY_LOG_DISABLE 1
#ifdef FEATURE_FOTA_USBURC_ENABLE
#define RTE_USB_EN 1
#endif
#endif /* __RTE_DEVICE_H */

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@ -1,77 +0,0 @@
#ifndef BL_BSP_H
#define BL_BSP_H
#ifdef __cplusplus
extern "C" {
#endif
#include "bsp.h"
#if 0
typedef enum
{
SelSerUart0PrintType = 0,
SelSerUart1PrintType = 1,
SelSerUart2PrintType = 2,
SelSerVCom0PrintType = 10,
SelSerVCom1PrintType = 11,
SelSerVCom2PrintType = 12,
}SelSerialPrintType;
#endif
typedef enum
{
URCUart1PrintType = 1,
URCVCom0PrintType = 4,
URCVCom1PrintType = 5,
URCVCom2PrintType = 6,
}URCSelPrintType;
void BSP_Init(void);
void BSP_DeInit(void);
void BL_CustomInit(void);
void BL_CustomDeInit(void);
void CleanBootRomResouce(void);
void bl_clk_check(void);
void SystemNormalBootInit(void);
uint8_t SystemWakeUpBootInit(void);
void BSP_QSPI_Set_Clk_50M(void);
void BSP_WdtInit(void);
void SelNormalOrURCPrint(uint32_t Sel);
/*ONLY for FOTA case!!!!!!, and only when SRAM is not enough
e.g. if FOTA and USB URC en, USB mem may in CSMB
call en API before USB init
access CSMB need power on CP, but SW has no method
to power off CP. for FOTA case, system will reboot
!!!!!!! Do not use the first two words on CSMB !!!!!!!!!
The base address of CSMB start from 0x200000, use from 0x200008
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
*/
void BSP_apAccCmsbEn(void);
void BSP_apAccCmsbDisEn(void);
/*
* URC set enable and baudrate value config
* Parameter: enable uart1/vcom0-2 init for urc, 0-disable, 1-enable
* Parameter: baudrate for UART1(URC)
* Parameter: serial type(uart1/vcom0-2)
* Parameter: index of uart(1) or vcom(0-2)
*/
void BSP_URCSetCfg(uint8_t enable, uint32_t baud, URCSelPrintType serlType, uint8_t serlIdx);
/*
* WDT wdt timecnt value config
* Parameter: Value - timecnt, timeout period equal to Value *20/32768 second
*/
void BSP_WdtTimeCntCfg(uint32_t Value);
#ifdef __cplusplus
}
#endif
#endif /* BL_BSP_H */

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@ -1,18 +0,0 @@
#ifndef __BL_LFS_H__
#define __BL_LFS_H__
#include "lfs.h"
#ifdef __cplusplus
extern "C"
{
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif

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@ -1,111 +0,0 @@
#ifndef BL_LINK_MEM_MAP_H
#define BL_LINK_MEM_MAP_H
/* -----------ram address define, TODO: need modify according to ram lauout-------------*/
//csmb start
#define CSMB_START_ADDR (0x0)
#define CSMB_END_ADDR (0x10000)
#define CSMB_TOTAL_LENGTH (CSMB_END_ADDR-CSMB_START_ADDR)
#define APVIEW_CSMB_START_ADDR (0x200000)
#define APVIEW_CSMB_HEAP_START (0x200010) // first two word used for fast boot, keep align
#define APVIEW_CSMB_HEAP_END (0x204000)
//csmb end
/*
0x00200000 |---------------------------------|
| RESERVED |
0x00200010 |---------------------------------| <---HEAP_START_ADDR(if exist)
| BL Heap |
0x00204000 |---------------------------------| <---HEAP_END_ADDR(if exist)
| BL CIRAM Code |
0x00210000 |---------------------------------|
*/
//msmb start
/*
0x00400000 |---------------------------------|
| RESERVED |
0x00402800 |---------------------------------|
| |
|---------------------------------|
| FOTA MUX MEM |
|---------------------------------|
| |
0x00500000 |---------------------------------|
| RESERVED |
0x00540000 | |
*/
#define MSMB_START_ADDR (0x00400000)
#if defined CHIP_EC718
#ifdef TYPE_EC718M
#define MSMB_END_ADDR (0x00428000)
#else
#define MSMB_END_ADDR (0x00540000)
#endif
#elif defined CHIP_EC716
#define MSMB_END_ADDR (0x00500000)
#endif
#define MSMB_TOTAL_LENGTH (MSMB_END_ADDR-MSMB_START_ADDR)
#ifdef TYPE_EC718M
#define PSRAM_FOTA_MUXMEM_BASE_ADDR (PSRAM_P0_START_ADDR + 0x2800)
#define PSRAM_FOTA_MUXMEM_END_ADDR (PSRAM_P0_START_ADDR + 0x100000)
#if 1
#define PSRAM_COMPR_MEM_BASE_ADDR (PSRAM_FOTA_MUXMEM_BASE_ADDR)
#define PSRAM_COMPR_MEM_END_ADDR (PSRAM_FOTA_MUXMEM_BASE_ADDR + 0xBA600)
#else
#define PSRAM_COMPR_MEM_BASE_ADDR (PSRAM_FOTA_MUXMEM_BASE_ADDR + 0x43200)
#define PSRAM_COMPR_MEM_END_ADDR (PSRAM_FOTA_MUXMEM_END_ADDR)
#endif
#define PSRAM_DECOMPR_MEM_BASE_ADDR (PSRAM_COMPR_MEM_BASE_ADDR)
#define PSRAM_DECOMPR_MEM_END_ADDR (PSRAM_COMPR_MEM_BASE_ADDR + 0x3CC00)
#else
#define MSMB_FOTA_MUXMEM_BASE_ADDR (MSMB_START_ADDR + 0x2800)
#define MSMB_FOTA_MUXMEM_END_ADDR (MSMB_START_ADDR + 0x100000)
//#ifdef FEATURE_FOTA_HLS_ENABLE
#if 1
#define MSMB_COMPR_MEM_BASE_ADDR (MSMB_FOTA_MUXMEM_BASE_ADDR)
#define MSMB_COMPR_MEM_END_ADDR (MSMB_FOTA_MUXMEM_BASE_ADDR + 0xBA600)
#else
#define MSMB_COMPR_MEM_BASE_ADDR (MSMB_FOTA_MUXMEM_BASE_ADDR + 0x43200)
#define MSMB_COMPR_MEM_END_ADDR (MSMB_FOTA_MUXMEM_END_ADDR)
#endif
#define MSMB_DECOMPR_MEM_BASE_ADDR (MSMB_COMPR_MEM_BASE_ADDR)
#define MSMB_DECOMPR_MEM_END_ADDR (MSMB_COMPR_MEM_BASE_ADDR + 0x3CC00)
#endif
//msmb end
//asmb start
#define ASMB_START_ADDR (0x00000000)
#define ASMB_END_ADDR (0x00010000)
#define ASMB_TOTAL_LENGTH (ASMB_END_ADDR-ASMB_START_ADDR)
//asmb end
//heap
#define HEAP_EXIST (1)
#define HEAP_START_ADDR (APVIEW_CSMB_HEAP_START)
#define HEAP_END_ADDR (APVIEW_CSMB_HEAP_END)
#define HEAP_TOTAL_LENGTH (HEAP_END_ADDR-HEAP_START_ADDR)
#define HEAP_PROTECT_SIZE (0x3FF0)
#if ((HEAP_TOTAL_LENGTH)>(HEAP_PROTECT_SIZE))
#error "Can't expand the size of heap, with the risk of overwriting other Sram!"
#endif
#endif

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@ -1,57 +0,0 @@
#ifndef BL_PRINT_H
#define BL_PRINT_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ec7xx.h"
#include "bsp.h"
#include <stdio.h>
typedef enum
{
EC_NUM_BASE_10 = 10,
EC_NUM_BASE_16 = 16,
}EC_NumBase_E;
#define EC_PRINTF_BUFFER_LENGTH 256
/*
* EC_Printf function.
* - Support output format:
* %x,%X,%s,%S,%d,%D. example likes EC_Printf("0x%x,%d,%s",10,10,"example").
* - return value:
* return the length of the outputed data if success;
* return -1 if failure;
* - note:
* double characters '%' can output one character '%'.
*/
int EC_Printf(const char * pFormat, ...);
/*
* EC_Sprintf function.
* - Support format:
* %x,%X,%02x,%02X(0:filled value, 2:length),%s,%S,%d,%D.
* example likes EC_Sprintf(pBuf,"0x%x,%d,%s,0x%08x",10,10,"example",10).
* - return value:
* return the length of the outputed data if success;
* return -1 if failure;
*/
int EC_Sprintf(char *pBuf, const char * pFormat, ...);
/*
* EC_Snprintf function.
* - Support output format:
* %x,%X,%02x,%02X,%s,%S,%d,%D.
* example likes EC_Snprintf(pBuf,20,"0x%x,%d,%s",10,10,"example").
* - return value:
* return the length of the spliced data if success;
* return -1 if failure;
*/
int EC_Snprintf(char *pBuf, int size, const char * pFormat, ...);
#ifdef __cplusplus
}
#endif
#endif /* BL_PRINT_H */

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#ifndef BL_UART_H
#define BL_UART_H
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
* API
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif
typedef struct uartFrameFormat
{
uint32_t dataBits : 8; // valid value: 8 or 7
uint32_t parity : 8; // valid value: 0(NONE), 1(ODD), 2(EVEN)
uint32_t stopBits : 8; // valid value: 1 or 2
uint32_t flowControl : 8; // valid value: 0(NONE), 1(rts), 2(cts), 3(rts & cts)
} uartPortFrameFormat_t;
/**
\fn void UART_init(uint32_t instance, uartPortFrameFormat_t* format, uint32_t baudrate)
\brief Initialize UART with specific baudrate
\param[in] instance UART instance number (0, 1, ...)
\param[in] format Pointer to UART frame format configuration
\param[in] baudrate The desired baudrate
*/
void UART_init(uint32_t instance, uartPortFrameFormat_t* format, uint32_t baudrate);
/**
\fn void UART_Deinit(uint32_t instance)
\brief De-initialize UART
\param[in] instance UART instance number (0, 1, ...)
*/
void UART_Deinit(uint32_t instance);
/**
\fn uint32_t UART_send(uint32_t instance, const uint8_t *data, uint32_t num, uint32_t timeout_us)
\brief Start sending data to USART transmitter in polling way
\param[in] instance UART instance number (0, 1, ...)
\param[in] data Pointer to buffer with data to send to USART transmitter
\param[in] num Number of data items to send
\param[in] timeout_us timeout value in unit of us
\return num of data items sent in the internal of timeout
*/
uint32_t UART_send(uint32_t instance, const uint8_t *data, uint32_t num, uint32_t timeout_us);
/**
\fn uint32_t UART_receive(uint32_t instance, uint8_t *data, uint32_t num, uint32_t timeout_us)
\brief Start receiving data from USART receiver in polling way
\param[in] instance UART instance number (0, 1, ...)
\param[out] data Pointer to buffer for data to receive from USART receiver
\param[in] num Number of data items to receive
\param[in] timeout_us timeout value in unit of us
\return num of data items received in the internal of timeout
*/
uint32_t UART_receive(uint32_t instance, uint8_t *data, uint32_t num, uint32_t timeout_us);
/** \} */
#ifdef __cplusplus
}
#endif
#endif /* BL_UART_H */

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#ifndef __BOOTROM_H__
#define __BOOTROM_H__
#define RESET_STAT_NORMAL 0
#define RESET_STAT_UNDEF 1
//#include "ARMCM3.h"
#include "ec7xx.h"
typedef struct {
uint32_t Reserved;
}FuseInfo;
#define ECDSA_PUBLIC_KEY_LEN 64 //BYTES
typedef struct {
//uint32_t BRDate;
//uint32_t BRVersion;
uint32_t PlatformType;
uint32_t PlatformSubType;
uint32_t ResetStat;
FuseInfo Fuse;
uint32_t Error;
uint32_t TransferAddr;
uint8_t SecurityInitialized;
uint8_t JTAGDisable;
uint8_t SecureBootEnabled;
uint8_t DbgDisable;
uint8_t DownloadDisable;
uint8_t Reserved[3];
uint8_t ECDSAPublickKey[ECDSA_PUBLIC_KEY_LEN];
}BRInfo, *PBRInfo;
extern PBRInfo GetBRInfo(void);
extern BRInfo GBRInfo;
#endif

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#ifndef __COMMON_H__
#define __COMMON_H__
//#include "ARMCM3.h"
#include "ec7xx.h"
#define ISRAM_PHY_ADDR 0x04000000
#define TICK_LOAD_VALUE 0x800000 //256 seconds for tick period
#define LOG_ON 1
#ifdef EC_ASSERT
#undef EC_ASSERT
#endif
#define EC_ASSERT(x,v1,v2,v3)
#if (FOTA_PRESET_RAM_ENABLE == 1)
extern int EC_Printf(const char * pFormat, ...);
extern int EC_Sprintf(char *pBuf, const char * pFormat, ...);
#define BL_LOGI(fmt,args...) EC_Printf(fmt, ##args)
#if (LOG_ON == 1)
#define BL_TRACE(fmt,args...) EC_Printf(fmt, ##args)
#else
#define BL_TRACE(fmt,args...)
#endif
#define BL_SPRINTF(buf,args...) EC_Sprintf(buf, ##args)
#ifdef ECPLAT_PRINTF
#undef ECPLAT_PRINTF
#endif
#define ECPLAT_PRINTF(moduleId, subId, debugLevel, format, ...) EC_Printf(format, ##__VA_ARGS__)
#else
#define BL_LOGI(fmt,args...) printf(fmt, ##args)
#define BL_TRACE(fmt,args...) printf(fmt, ##args)
#define BL_SPRINTF(buf,args...) sprintf(buf, ##args)
#ifdef ECPLAT_PRINTF
#undef ECPLAT_PRINTF
#endif
#define ECPLAT_PRINTF(moduleId, subId, debugLevel, format, ...) printf(format, ##__VA_ARGS__)
#endif
extern void trace(char*log,int len);
extern void show_err(uint32_t err);
void uDelay(void);
//#define QSPI_DRIVER_ORG
#endif

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@ -1,54 +0,0 @@
#ifndef __ERROR_H__
#define __ERROR_H__
#define NoError 0x0
#define IllegalAddressError 0x1
#define EfusePorTimeOutError 0x20
#define EfusePorFailError 0x21
#define EfuseSwReadTimeOutError 0x24
#define EFuseSwReadFailEror 0x25
#define EFuseSwReadLocError 0x26
#define SpiReadErr 0x30
#define SpiWriteErr 0x31
#define SpiEraseErr 0x32
#define GPP_PackageNotFound 0x50
#define GPP_UnknownOperation 0x51
#define INSTR_Timeout 0x52
#define INSTR_InvalidMaskOrValue 0x53
#define INSTR_InvalidAddress 0x54
#define INSTR_UnknownInstruction 0x5f
#define InvalidHeadKeyHashError 0x6a
#define InvalidBodyKeyHashError 0x6b
#define InvalidEcdsaVerifyError 0x6c
#define IHNotFound 0x6d
#define ImageToBigError 0x6e
#define ImageHeadToBigError 0x6f
#define CmdMisMatchError 0x80
#define CommandIDError 0x81
#define DownloadImageTooBigError 0x94
#define TimeOutError 0x96
#define UnknownImageError 0x98
#define DownloadBreakError 0x99
#define CrcCheckError 0x9a
#define SequenceCheckError 0x9c
#define UartLNSError 0x9d
#define UartReadWriteTimeOutError 0x9e
#define SHABusyError 0xa0
#define SHATimeOutError 0xa1
#define AESBusyError 0xa2
#define AESTimeOutError 0xa3
#define TestError 0xff000000
#endif

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@ -1,125 +0,0 @@
#ifndef __IMAGE_H__
#define __IMAGE_H__
//#include "ARMCM3.h"
#include "ec7xx.h"
#include "mem_map.h"
//#pragma pack(1)
#define TIMIDENTIFIER 0x54494D48 // "TIMH"
#define OBMIDENTIFIER 0x4F424D49 // "OBMI"
#define DKBIDENTIFIER 0x444B4249 // "DKBI"
#define WTPRESERVEDAREAID 0x4F505448 // "OPTH"
#define DOWNLOAD_EXEC 0
#define DOWNLOAD_BURN 1
#define SHA256_NONE 0xee
typedef struct {
uint32_t Version;
uint32_t Identifier;
uint32_t Date;
uint32_t OEMReserve;
}VersionInfo;
typedef struct {
uint32_t ImageId;
uint32_t BurnAddr; //Flash addr
uint32_t LoadAddr;
uint32_t ApImageSze;
uint32_t CpImageSze;
uint32_t Reserved[3];
uint8_t Hash[28]; //hash 224
uint8_t Rsv_0[4];
uint8_t ECDSASign[56];
uint8_t Rsv_1[72];
}ImageBodyInfo;
typedef struct {
uint32_t ReservedAreaId;
uint32_t ReservedSize;
uint32_t Reserved[2];
}ReservedArea;
typedef struct {
VersionInfo Version;
uint32_t ImageNum;
uint32_t Type; //bit7-0, hashih type: 0xee-none, other-sha256
uint32_t reserved[2];
uint8_t HashIH[28];
uint32_t reserved1;
ImageBodyInfo ImgBodyInfo;
ReservedArea RsvArea; //point to reaserved area at tail of ImageHead
}ImageHead;
typedef struct DownloadCtrl
{
uint32_t type;
}DownloadCtrl;
extern uint32_t LoadVerifyImageHead(void);
extern uint32_t LoadIVerifymageBody(void);
extern ImageHead GImageHead;
//0x00800000----0x00820000 reserved 128KB for OBM
//BLIMG_HEAD_FLASH_ENTRY_ADDR 0x00800000 - 0x00802000 8k
//SYSIMG head MAP 4k + 4k
////SYSIMG1_HEAD_FLASH_ENTRY_ADDR 0x00802000 - 0x00803000 4k
////SYSIMG2_HEAD_FLASH_ENTRY_ADDR 0x00803000 - 0x00804000 4k
//BLIMG_BODY_FLASH_ENTRY_ADDR 0x00804000 - 0x00820000 112k
//0x00820000----0x00C00000 reserved 4M-128K for system
//SYSIMG_BODY_FLASH_ENTRY_ADDR 0x00820000 - 0x00C00000 4M-128K
//LOAD BUFFER FOR VERIFY
//IMG_BODY_LOAD_ADDR 0x00020000 - 0x00038000 96k
//IMG_HEAD_LOAD_ADDR 0x00038000 - 0x0003a000 8k
#define IRAM_IMAGE_LOAD_BASE 0x00420000
#define IMAGE_HEAD_UNIT_SIZE 0x1000 //4k unit size for image head
#define BLIMG_HEAD_AREA_SIZE (IMAGE_HEAD_UNIT_SIZE) //4k unit size for bl image head area
//LOAD BUFFER AREA
#define IMG_HEAD_LOAD_ADDR (IRAM_IMAGE_LOAD_BASE)
#define IMG_HEAD_MAX_SIZE (BLIMG_HEAD_AREA_SIZE) //4k
#define IMG_BODY_LOAD_ADDR (IMG_HEAD_LOAD_ADDR+IMG_HEAD_MAX_SIZE)
//AGENT IMAGE
//IMAGE AREA
#define FLASH_BASE_ADDR AP_FLASH_XIP_ADDR
//IMAGE OFFSET
//spi rw addr, for security boot verify system img
#define BLIMG_HEAD_FLASH_OFFSET_ADDR 0
#define SYSIMG_HEAD_FLASH_OFFSET_ADDR (BLIMG_HEAD_FLASH_OFFSET_ADDR+BLIMG_HEAD_AREA_SIZE)
//BOOTLOADER IMAGE
//SYSTEM IMAGE
//#define SYSIMG_HEAD_MAX_SIZE 0x2000
// header and image region
//ap
#define AP_HEAD_FLASH_OFFSET_ADDR SYSIMG_HEAD_FLASH_OFFSET_ADDR
#define AP_BODY_FLASH_OFFSET_ADDR (AP_FLASH_LOAD_ADDR - AP_FLASH_XIP_ADDR)
#define AP_BODY_MAX_SIZE AP_FLASH_LOAD_SIZE
//cp
#define CP_BODY_FLASH_OFFSET_ADDR (CP_FLASH_LOAD_ADDR - CP_FLASH_XIP_ADDR)
uint32_t LoadVerifyImageHead(void);
uint32_t LoadVerifyImageBody(void);
#endif

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@ -1,256 +0,0 @@
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
#include "lfs_port.h"
#include "lfs_util.h"
#include "bl_lfs.h"
#include "common.h"
#if defined CHIP_EC718 || defined CHIP_EC716
extern uint8_t FLASH_XIPRead(uint8_t* pData, uint32_t ReadAddr, uint32_t Size);
extern uint8_t FLASH_write(uint8_t* pData, uint32_t WriteAddr, uint32_t Size);
extern uint8_t FLASH_eraseSectorSafe(uint32_t SectorAddress);
extern uint8_t FLASH_erase32KBlkSafe(uint32_t SectorAddress);
#define LFS_FLASH_ERASE(addr) FLASH_eraseSectorSafe(addr)
#define LFS_FLASH_ERASE_32K(addr) FLASH_erase32KBlkSafe(addr)
#define LFS_FLASH_WRITE(buf, addr, size) FLASH_write(buf, addr, size)
#define LFS_FLASH_READ(buf, addr, size) FLASH_XIPRead(buf, addr, size)
#endif
extern lfs_t littlefs;
/***************************************************
*************** MACRO ******************
***************************************************/
#define EXTERNAL_FLASH_LFS_REGION_START FLASH_FS_REGION_START
#define LITTLEFS_BLOCK_DEVICE_READ_SIZE (256)
#define LITTLEFS_BLOCK_DEVICE_PROG_SIZE (256)
#define LITTLEFS_BLOCK_DEVICE_CACHE_SIZE (256)
#define LITTLEFS_BLOCK_DEVICE_ERASE_SIZE (4096) // one sector 4KB
#define LITTLEFS_BLOCK_DEVICE_TOTOAL_SIZE FLASH_FS_REGION_SIZE
#define LITTLEFS_BLOCK_DEVICE_LOOK_AHEAD (16)
/***************************************************
******* FUNCTION FORWARD DECLARTION ********
***************************************************/
// Read a block
static int bd_read(const struct lfs_config *cfg, lfs_block_t block,
lfs_off_t off, void *buffer, lfs_size_t size);
// Program a block
//
// The block must have previously been erased.
static int bd_prog(const struct lfs_config *cfg, lfs_block_t block,
lfs_off_t off, const void *buffer, lfs_size_t size);
// Erase a block
//
// A block must be erased before being programmed. The
// state of an erased block is undefined.
static int bd_erase(const struct lfs_config *cfg, lfs_block_t block);
// Sync the block device
static int bd_sync(const struct lfs_config *cfg);
// utility functions for traversals
static int littlefs_statfs_count(void *p, lfs_block_t b);
/***************************************************
*************** GLOBAL VARIABLE *****************
***************************************************/
// variables used by the filesystem
lfs_t littlefs;
static char littlefs_read_buf[256];
static char littlefs_prog_buf[256];
static __ALIGNED(4) char littlefs_lookahead_buf[LITTLEFS_BLOCK_DEVICE_LOOK_AHEAD];
// configuration of the filesystem is provided by this struct
static struct lfs_config littlefs_cfg =
{
.context = NULL,
// block device operations
.read = bd_read,
.prog = bd_prog,
.erase = bd_erase,
.sync = bd_sync,
// block device configuration
.read_size = LITTLEFS_BLOCK_DEVICE_READ_SIZE,
.prog_size = LITTLEFS_BLOCK_DEVICE_PROG_SIZE,
.block_size = LITTLEFS_BLOCK_DEVICE_ERASE_SIZE,
.block_count = LITTLEFS_BLOCK_DEVICE_TOTOAL_SIZE / LITTLEFS_BLOCK_DEVICE_ERASE_SIZE,
.block_cycles = 200,
.cache_size = LITTLEFS_BLOCK_DEVICE_CACHE_SIZE,
.lookahead_size = LITTLEFS_BLOCK_DEVICE_LOOK_AHEAD,
.read_buffer = littlefs_read_buf,
.prog_buffer = littlefs_prog_buf,
.lookahead_buffer = littlefs_lookahead_buf,
.name_max = 0,
.file_max = 0,
.attr_max = 0
};
/***************************************************
******* INTERANL FUNCTION ********
***************************************************/
static int bd_read(const struct lfs_config *cfg, lfs_block_t block,
lfs_off_t off, void *buffer, lfs_size_t size)
{
// Check if read is valid
LFS_ASSERT(off % cfg->read_size == 0);
LFS_ASSERT(size % cfg->read_size == 0);
LFS_ASSERT(block < cfg->block_count);
LFS_FLASH_READ((uint8_t *)buffer, (EXTERNAL_FLASH_LFS_REGION_START + block * cfg->block_size + off), size);
return 0;
}
static int bd_prog(const struct lfs_config *cfg, lfs_block_t block,
lfs_off_t off, const void *buffer, lfs_size_t size)
{
// Check if write is valid
LFS_ASSERT(off % cfg->prog_size == 0);
LFS_ASSERT(size % cfg->prog_size == 0);
LFS_ASSERT(block < cfg->block_count);
LFS_FLASH_WRITE((uint8_t *)buffer,(EXTERNAL_FLASH_LFS_REGION_START + block * cfg->block_size + off), size);
return 0;
}
static int bd_erase(const struct lfs_config *cfg, lfs_block_t block)
{
// Check if erase is valid
LFS_ASSERT(block < cfg->block_count);
LFS_FLASH_ERASE(EXTERNAL_FLASH_LFS_REGION_START + block * cfg->block_size);
return 0;
}
static int bd_sync(const struct lfs_config *cfg)
{
return 0;
}
static int littlefs_statfs_count(void *p, lfs_block_t b)
{
*(lfs_size_t *)p += 1;
return 0;
}
/***************************************************
******* FUNCTION IMPLEMENTATION ********
***************************************************/
// Initialize
int LFS_init(void)
{
// mount the filesystem
int err = lfs_mount(&littlefs, &littlefs_cfg);
// reformat if we can't mount the filesystem
// this should only happen on the first boot
if (err)
{
err = lfs_format(&littlefs, &littlefs_cfg);
if(err)
return err;
err = lfs_mount(&littlefs, &littlefs_cfg);
if(err)
return err;
}
return 0;
}
// Deinit
void LFS_deinit(void)
{
// release any resources we were using
lfs_unmount(&littlefs);
}
int LFS_format(void)
{
return lfs_format(&littlefs, &littlefs_cfg);
}
int LFS_stat(const char *path, struct lfs_info *info)
{
return lfs_stat(&littlefs, path, info);
}
int LFS_remove(const char *path)
{
return lfs_remove(&littlefs, path);
}
int LFS_fileOpen(lfs_file_t *file, const char *path, int flags)
{
return lfs_file_open(&littlefs, file, path, flags);
}
int LFS_fileClose(lfs_file_t *file)
{
return lfs_file_close(&littlefs, file);
}
lfs_ssize_t LFS_fileRead(lfs_file_t *file, void *buffer, lfs_size_t size)
{
return lfs_file_read(&littlefs, file, buffer, size);
}
lfs_ssize_t LFS_fileWrite(lfs_file_t *file, const void *buffer, lfs_size_t size)
{
return lfs_file_write(&littlefs, file, buffer, size);
}
int LFS_fileSync(lfs_file_t *file)
{
return lfs_file_sync(&littlefs, file);
}
lfs_soff_t LFS_fileSeek(lfs_file_t *file, lfs_soff_t off, int whence)
{
return lfs_file_seek(&littlefs, file, off, whence);
}
int LFS_fileTruncate(lfs_file_t *file, lfs_off_t size)
{
return lfs_file_truncate(&littlefs, file, size);
}
lfs_soff_t LFS_fileTell(lfs_file_t *file)
{
return lfs_file_tell(&littlefs, file);
}
int LFS_fileRewind(lfs_file_t *file)
{
return lfs_file_rewind(&littlefs, file);
}
lfs_soff_t LFS_fileSize(lfs_file_t *file)
{
return lfs_file_size(&littlefs, file);
}
int LFS_statfs(lfs_status_t *status)
{
status->total_block = littlefs_cfg.block_count;
status->block_size = littlefs_cfg.block_size;
return lfs_fs_traverse(&littlefs, littlefs_statfs_count, &(status->block_used));
}

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#include "bl_print.h"
#include <string.h>
#include "sctdef.h"
extern int io_putchar(int ch);
PLAT_BL_CIRAM_FLASH_TEXT static void EC_flush_fullBuf(const char *pBuf)
{
while('\0' != *pBuf)
{
io_putchar(*pBuf++);
}
return;
}
PLAT_BL_CIRAM_FLASH_TEXT void EC_Ita(char * pStr, uint32_t nNum, EC_NumBase_E eBase)
{
static char * pTemp;
pTemp =pStr;
if(nNum != 0)
{
EC_Ita(pStr, nNum / eBase, eBase);
if (eBase == EC_NUM_BASE_10)
{
*pTemp++ = nNum % eBase + '0';
}
else
{
if (nNum % eBase <= 9)
{
*pTemp++ = nNum % eBase + '0';
}
else
{
*pTemp++ = nNum % eBase - 10 + 'a';
}
}
}
*pTemp = '\0';
}
PLAT_BL_CIRAM_FLASH_TEXT char * EC_Itoa(char * pStr, const int rInt, EC_NumBase_E eBase, uint8_t ucWidth, uint8_t ucFillVal)
{
if (eBase == EC_NUM_BASE_10)
{
if(rInt ==0)
{
*pStr++ = '0';
*pStr = '\0';
}
else if(rInt > 0)
{
EC_Ita(pStr, rInt, eBase);
}
else
{
*pStr = '-';
EC_Ita(pStr + 1, -rInt, eBase);
}
}
else
{
char *pTmp = pStr;
// *pTmp++ = '0';
// *pTmp++ = 'x';
if (rInt ==0)
{
*pTmp++ = '0';
*pTmp++ = '0';
*pTmp = '\0';
}
else
{
char cBuf[9] = "";
EC_Ita(cBuf, rInt, eBase);
if (strlen((char *)cBuf) >= ucWidth)
{
memcpy((void *)pTmp, (void *)cBuf, strlen((char *)cBuf));
}
else
{
for (int i = ucWidth - strlen((char *)cBuf); i > 0; i--)
{
*pTmp++ = ucFillVal;
}
memcpy((void *)pTmp, (void *)cBuf, strlen((char *)cBuf));
}
pTmp[strlen((char *)cBuf)] = '\0';
}
}
return pStr;
}
PLAT_BL_CIRAM_FLASH_TEXT int EC_Snprintf(char *pBuf, int size, const char * pFormat, ...)
{
if ((NULL == pBuf) || (NULL == pFormat) || (0 >= size))
{
return -1;
}
const int * pMove = (const int *)(&pFormat + 1);
char Szbuff[32] = "";
const char * pTemp;
const char * pBufHead = pBuf;
uint8_t ucHexWidth = 0;
uint8_t ucHexFilVal = 0;
while(('\0' != *pFormat) && (1 < size))
{
if('%' == *pFormat)
{
++pFormat;
switch(*pFormat)
{
case 'x':
case 'X':
{
EC_Itoa(Szbuff, *pMove++, EC_NUM_BASE_16, 0, 0);
pTemp = Szbuff;
while('\0' != *pTemp)
{
*pBuf++ = *pTemp++;
if (--size == 1)
{
break;
}
}
break;
}
case 's':
case 'S':
{
pTemp = (const char *)(*pMove++);
while ('\0' != *pTemp)
{
*pBuf++ = *pTemp++;
if (--size == 1)
{
break;
}
}
break;
}
case 'd':
case 'D':
{
EC_Itoa(Szbuff, *pMove++, EC_NUM_BASE_10, 0, 0);
pTemp = Szbuff;
while('\0' != *pTemp)
{
*pBuf++ = *pTemp++;
if (--size == 1)
{
break;
}
}
break;
}
default:
{
// suppose that the format is like %02x or %02X
ucHexFilVal = *pFormat++;
ucHexWidth = *pFormat++ - '0';
if (('x' != *pFormat) && ('X' != *pFormat))
{
EC_flush_fullBuf("This fomart is not support, should like %02x or %02X\r\n");
return -1;
}
EC_Itoa(Szbuff, *pMove++, EC_NUM_BASE_16, ucHexWidth, ucHexFilVal);
pTemp = Szbuff;
while('\0' != *pTemp)
{
*pBuf++ = *pTemp++;
if (--size == 1)
{
break;
}
}
break;
}
}
}
else
{
*pBuf++ = *pFormat;
size--;
}
++pFormat;
}
*pBuf = '\0';
return (int)(pBuf - pBufHead);
}
PLAT_BL_CIRAM_FLASH_TEXT int EC_Sprintf(char *pBuf, const char * pFormat, ...)
{
if ((NULL == pBuf) || (NULL == pFormat))
{
return -1;
}
const int * pMove = (const int *)(&pFormat + 1);
char Szbuff[32] = "";
const char * pTemp;
const char * pBufHead = pBuf;
uint8_t ucHexWidth = 0;
uint8_t ucHexFilVal = 0;
while('\0' != *pFormat)
{
if('%' == *pFormat)
{
++pFormat;
switch(*pFormat)
{
case 'x':
case 'X':
{
EC_Itoa(Szbuff, *pMove++, EC_NUM_BASE_16, 0, 0);
pTemp = Szbuff;
while('\0' != *pTemp)
{
*pBuf++ = *pTemp++;
}
break;
}
case 's':
case 'S':
{
pTemp = (const char *)(*pMove++);
while ('\0' != *pTemp)
{
*pBuf++ = *pTemp++;
}
break;
}
case 'd':
case 'D':
{
EC_Itoa(Szbuff, *pMove++, EC_NUM_BASE_10, 0, 0);
pTemp = Szbuff;
while('\0' != *pTemp)
{
*pBuf++ = *pTemp++;
}
break;
}
case '%':
{
*pBuf++ = '%';
break;
}
default:
{
// suppose that the format is like %02x or %02X
ucHexFilVal = *pFormat++;
ucHexWidth = *pFormat++ - '0';
if (('x' != *pFormat) && ('X' != *pFormat))
{
EC_flush_fullBuf("This fomart is not support, should like %02x or %02X\r\n");
return -1;
}
EC_Itoa(Szbuff, *pMove++, EC_NUM_BASE_16, ucHexWidth, ucHexFilVal);
pTemp = Szbuff;
while('\0' != *pTemp)
{
*pBuf++ = *pTemp++;
}
break;
}
}
}
else
{
*pBuf++ = *pFormat;
}
++pFormat;
}
*pBuf = '\0';
return (int)(pBuf - pBufHead);
}
PLAT_BL_CIRAM_FLASH_TEXT int EC_Printf(const char * pFormat, ...)
{
if(NULL != pFormat)
{
const int * pMove = (const int *)(&pFormat + 1);
char SzBuff[EC_PRINTF_BUFFER_LENGTH] = "";
char Szbuff[32] = "";
char * pSzBuff = SzBuff;
const char * pTemp;
int iTmpFlag = 0;
int iCounter = 0;
while('\0' != *pFormat)
{
if('%' == *pFormat)
{
++pFormat;
switch(*pFormat)
{
case 'x':
case 'X':
{
EC_Itoa(Szbuff, *pMove++, EC_NUM_BASE_16, 0, 0);
pTemp = Szbuff;
while('\0' != *pTemp)
{
*pSzBuff++ = *pTemp++;
iTmpFlag++;
iCounter++;
if (iTmpFlag >= EC_PRINTF_BUFFER_LENGTH - 1)
{
*pSzBuff = '\0';
EC_flush_fullBuf(SzBuff);
pSzBuff = SzBuff;
iTmpFlag = 0;
}
}
break;
}
case 's':
case 'S':
{
pTemp = (const char *)(*pMove++);
while ('\0' != *pTemp)
{
*pSzBuff++ = *pTemp++;
iTmpFlag++;
iCounter++;
if (iTmpFlag >= EC_PRINTF_BUFFER_LENGTH - 1)
{
*pSzBuff = '\0';
EC_flush_fullBuf(SzBuff);
pSzBuff = SzBuff;
iTmpFlag = 0;
}
}
break;
}
case 'd':
case 'D':
{
EC_Itoa(Szbuff, *pMove++, EC_NUM_BASE_10, 0, 0);
pTemp = Szbuff;
while('\0' != *pTemp)
{
*pSzBuff++ = *pTemp++;
iTmpFlag++;
iCounter++;
if (iTmpFlag >= EC_PRINTF_BUFFER_LENGTH - 1)
{
*pSzBuff = '\0';
EC_flush_fullBuf(SzBuff);
pSzBuff = SzBuff;
iTmpFlag = 0;
}
}
break;
}
case '%':
{
iTmpFlag++;
iCounter++;
*pSzBuff++ = '%';
if (iTmpFlag >= EC_PRINTF_BUFFER_LENGTH - 1)
{
*pSzBuff = '\0';
EC_flush_fullBuf(SzBuff);
pSzBuff = SzBuff;
iTmpFlag = 0;
}
break;
}
default:
{
pTemp = pFormat;
int i = 0;
Szbuff[i++] = '%';
while ((*pTemp != 'X') && (*pTemp != 'x') && \
(*pTemp != 'S') && (*pTemp != 's') && \
(*pTemp != 'd') && (*pTemp != 'D'))
{
Szbuff[i++] = *pTemp++;
}
Szbuff[i++] = *pTemp;;
Szbuff[i] = '\0';
EC_Sprintf(SzBuff, "This format (%s) is not support, just support %s\r\n",Szbuff,"%x, %s and %d");
EC_flush_fullBuf(SzBuff);
return -1;
}
}
}
else
{
iTmpFlag++;
iCounter++;
*pSzBuff++ = *pFormat;
if (iTmpFlag >= EC_PRINTF_BUFFER_LENGTH - 1)
{
*pSzBuff = '\0';
EC_flush_fullBuf(SzBuff);
pSzBuff = SzBuff;
iTmpFlag = 0;
}
}
++pFormat;
}
*pSzBuff = '\0';
pSzBuff = SzBuff;
while('\0' != *pSzBuff)
{
io_putchar(*pSzBuff++);
}
return iCounter;
}
return -1;
}

View File

@ -1,201 +0,0 @@
#include <stdarg.h>
#include <stdio.h>
#include <string.h>
#include "ec7xx.h"
#include "clock.h"
#include "bl_uart.h"
#include "bsp.h"
#include "sctdef.h"
extern void delay_us(uint32_t us);
static USART_TypeDef* const gUartBases[] = USART_INSTANCE_ARRAY;
static const ClockId_e g_uartClocks[] = UART_CLOCK_VECTOR;
static const ClockResetVector_t g_uartResetVectors[] = UART_RESET_VECTORS;
PLAT_BL_CIRAM_FLASH_TEXT void UART_setBaudrate(uint32_t instance, uint32_t baudrate)
{
uint32_t uart_clock = 0;
uint32_t div;
uart_clock = CLOCK_getClockFreq(g_uartClocks[instance*2+1]);
/*
* formula to calculate baudrate, baudrate = clock_in / divisor_value,
* where divisor_value = DIVR_INT.DIVR_FRAC(4 digits)
*/
// round to nearest value
div = ((uart_clock << 4) + (baudrate >> 1)) / baudrate;
// Integer part of divisor value shall not be zero, otherwise, the result is invalid
if ((div >> 4) == 0)
return;
// Disable uart first
gUartBases[instance]->ENR = 0;
gUartBases[instance]->DIVR = div;
}
PLAT_BL_CIRAM_FLASH_TEXT void UART_init(uint32_t instance, uartPortFrameFormat_t* format, uint32_t baudrate)
{
if(instance == PORT_USART_INVALID) return;
// Reset uart
GPR_swResetModule(&g_uartResetVectors[instance]);
// enable clock
GPR_clockEnable(g_uartClocks[instance*2]);
GPR_clockEnable(g_uartClocks[instance*2+1]);
uint32_t lcr = gUartBases[instance]->LCR;
UART_setBaudrate(instance, baudrate);
switch(format->dataBits)
{
case 7:
lcr &= ~USART_LCR_CHAR_LEN_Msk;
lcr |= 2U;
break;
default:
// 8 bits
lcr &= ~USART_LCR_CHAR_LEN_Msk;
lcr |= 3U;
break;
}
switch(format->parity)
{
case 1:
// ODD
lcr |= USART_LCR_PARITY_EN_Msk;
lcr &= ~USART_LCR_EVEN_PARITY_Msk;
break;
case 2:
// EVEN
lcr |= (USART_LCR_PARITY_EN_Msk | USART_LCR_EVEN_PARITY_Msk);
break;
default:
// NONE
lcr &= ~USART_LCR_PARITY_EN_Msk;
break;
}
switch(format->stopBits)
{
case 2:
// 2 bits
lcr &=~ USART_LCR_STOP_BIT_NUM_Msk;
lcr |= EIGEN_VAL2FLD(USART_LCR_STOP_BIT_NUM, 2);
break;
default:
// 1 bit
lcr &=~ USART_LCR_STOP_BIT_NUM_Msk;
break;
}
switch(format->flowControl)
{
case 3:
// rts & cts, set RTS pin to low
gUartBases[instance]->FLOWCR &= ~USART_FLOWCR_RTS_Msk;
gUartBases[instance]->MCR |= (USART_MCR_AUTO_FLOW_CTS_EN_Msk);
break;
case 2:
// cts only
gUartBases[instance]->MCR |= USART_MCR_AUTO_FLOW_CTS_EN_Msk;
break;
case 1:
// set RTS pin to low
gUartBases[instance]->FLOWCR &= ~USART_FLOWCR_RTS_Msk;
break;
case 0:
default:
break;
}
gUartBases[instance]->LCR = lcr;
gUartBases[instance]->ENR = USART_ENR_TX_EN_Msk | USART_ENR_RX_EN_Msk;
}
PLAT_BL_CIRAM_FLASH_TEXT void UART_Deinit(uint32_t instance)
{
if(instance == PORT_USART_INVALID) return;
// Reset uart
GPR_swResetModule(&g_uartResetVectors[instance]);
// enable clock
GPR_clockDisable(g_uartClocks[instance*2]);
GPR_clockDisable(g_uartClocks[instance*2+1]);
}
PLAT_BL_CIRAM_FLASH_TEXT void UART_flush(uint32_t instance)
{
//write 1 and dummy read twice and clear
gUartBases[instance]->FCR0 |= USART_FCR0_TXFIFO_FLUSH_Msk | USART_FCR0_RXFIFO_FLUSH_Msk;
(void) gUartBases[instance]->FCR0;
(void) gUartBases[instance]->FCR0;
gUartBases[instance]->FCR0 &= ~(USART_FCR0_TXFIFO_FLUSH_Msk | USART_FCR0_RXFIFO_FLUSH_Msk);
}
PLAT_BL_CIRAM_FLASH_TEXT uint32_t UART_send(uint32_t instance, const uint8_t *data, uint32_t num, uint32_t timeout_us)
{
for(uint32_t i = 0; i < num; i++)
{
while((EIGEN_FLD2VAL(USART_FSR_TXFIFO_WL, gUartBases[instance]->FSR) != 0) && timeout_us)
{
delay_us(1);
timeout_us--;
}
if(timeout_us == 0)
return i;
// wait until tx is empty
while((UART_readLSR(&(gUartBases[instance]->LSR)) & USART_LSR_TX_BUSY_Msk) && timeout_us)
{
delay_us(1);
timeout_us--;
}
if(timeout_us == 0)
return i;
gUartBases[instance]->TDR = data[i];
}
return num;
}
PLAT_BL_CIRAM_FLASH_TEXT uint32_t UART_receive(uint32_t instance, uint8_t *data, uint32_t num, uint32_t timeout_us)
{
uint32_t timeoutValue = timeout_us;
for(uint32_t i = 0; i < num; i++)
{
//wait until receive data is ready
while(((EIGEN_FLD2VAL(USART_FSR_RXFIFO_WL, gUartBases[instance]->FSR)) == 0) && timeout_us)
{
delay_us(1);
timeout_us--;
}
if(timeout_us == 0)
return i;
//read data
timeout_us = timeoutValue;
data[i] = gUartBases[instance]->RDR;
}
return num;
}

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@ -1,639 +0,0 @@
/* --------------------------------------------------------------------------
* Copyright (c) 2013-2017 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Name: Bootmain.c
* Purpose: for cm3 bootrom
*
*---------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------*
* INCLUDES *
*----------------------------------------------------------------------------*/
#include "ec7xx.h"
#include <stdio.h>
#include "error.h"
#include "boot.h"
#include "common.h"
#include "image.h"
#include <string.h>
#include "cache.h"
#include "mem_map.h"
#include "bl_bsp.h"
#include "pwrkey.h"
#include "plat_config.h"
#include "gpr_common.h"
#if (WDT_FEATURE_ENABLE==1)
#include "wdt.h"
#endif
#include "bl_uart.h"
#include "bl_print.h"
#include "sctdef.h"
/*----------------------------------------------------------------------------*
* MACROS *
*----------------------------------------------------------------------------*/
#if (WDT_FEATURE_ENABLE==1)
#define WDT_TIMEOUT_VALUE (20) // in unit of second, shall be less than 256s
#endif
#define XIP_BOOT 0
#define DOWNLOAD_BOOT 1
/* default port type */
#ifdef FEATURE_FOTA_USBURC_ENABLE
#define FOTA_DFT_URC_PORT_TYPE PLAT_CFG_FOTA_URC_PORT_USB
#else
#define FOTA_DFT_URC_PORT_TYPE PLAT_CFG_FOTA_URC_PORT_UART
#endif
/*----------------------------------------------------------------------------*
* DATA TYPE DEFINITION *
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------*
* FUNCTION DECLEARATION *
*----------------------------------------------------------------------------*/
extern int32_t efuseSWReadSafePolling(uint8_t ByteLoc, uint8_t ByteLen, uint8_t *PBuff);
extern int32_t EFuseSWBurn(uint32_t BitLoc, uint8_t BitLen, uint8_t *PBuff);
extern void Flash_NVICSwReset(void);
extern void FotaProcedure(void);
extern void Bltransfer_Control(uint32_t p_base_addr);
/*----------------------------------------------------------------------------*
* GLOBAL VARIABLES *
*----------------------------------------------------------------------------*/
DownloadCtrl GDownloadCtrl;
volatile usart_port_t UsartLogPortIdx = PORT_USART_0; // set value to PORT_USART_INVALID to disable log output
volatile usart_port_t UsartUrcPortIdx = PORT_USART_1;
URCSelPrintType URCSelSerlType = URCUart1PrintType;
uint32_t URCBaudValue = 115200;
uint8_t URCSelSerlIdx = 0;
uint8_t URCEnable = 0;
uint8_t URCPrintActive = 0;
/*----------------------------------------------------------------------------*
* GLOBAL FUNCTIONS *
*----------------------------------------------------------------------------*/
void uDelay(void)
{
int32_t i=0;
for(i=0;i<70;i++);
}
void mDelay(int ms)
{
int32_t i=0;
for(i=0;i<70000;i++);
}
void Delay(int sec)
{
int32_t i=0;
for(i=0;i<1000;i++)
{
mDelay(1);
}
}
#ifdef CONFIG_PROJ_APP_SECURITY_BOOT
extern unsigned char gVerifyPubKey[56];
extern unsigned char blPubKey[56];
uint8_t *GetVerifyPubKey(void)
{
return &gVerifyPubKey[0];
}
PLAT_BL_CIRAM_FLASH_TEXT uint8_t *GetBlPubKey(void)
{
return &blPubKey[0];
}
#endif
PLAT_BL_AIRAM_PRE2_TEXT void SystemXIPFastBoot(void)
{
//printf("bootloader try xip boot system start!\n");
#if 1
CleanBootRomResouce();
//flush cache
DisableICache();
__DSB();
__ISB();
EnableICache();
#endif
Bltransfer_Control(AP_FLASH_LOAD_ADDR);
while(1);
}
extern UINT32 flashXIPLimit;
PLAT_BL_UNCOMP_FLASH_TEXT uint32_t SystemXIPNormalBoot(void)
{
if(UsartLogPortIdx != PORT_USART_INVALID)
{
BL_LOGI("bootloader flashXIPLimit(0x%x), try normal boot system start!\n", &flashXIPLimit);
}
#ifdef CONFIG_PROJ_APP_SECURITY_BOOT// if (IsSecuritySupport() == 1)//CONFIG_PROJ_APP_SECURITY_BOOT == y
{
uint8_t* pBlKey = GetBlPubKey();
int32_t bureResult = 0;
if (GetBRInfo()->SecureBootEnabled == 0)//haven't burn secure en bit
{
//burn en bit and pubkey
BL_TRACE("blPubKey:\n");
for(int j=0; j<2; j++){
for(int k=0; k<28; k++)
{
BL_TRACE("0x%x,",pBlKey[k+28*j]);
}
BL_TRACE("\n");
}
BL_TRACE("burn bl pubkey...\n");
uint8_t tmpLen = 56; // Efuse ECDSA key part, total 56 bytes
uint8_t temphead = 0;
uint16_t bitStart = 512; // Efuse AES part, start at bit 192
// always on pclk_aon/cpmu/pmdig/rfdig/pclk_tmu , since very low leakage from test
//GPR->APBGPPCLKENAP |= 0xBF;
*(volatile uint32_t*)0x4f000010 |= 1<<5;
*(volatile uint32_t*)0x4f08008c = 0x1;//EFuseBurnIgnorePOR1()
do
{
bureResult = EFuseSWBurn(bitStart, 64, &pBlKey[temphead]); // Every time it can burn 8 bytes at most
BL_TRACE("bureResult=%d\n",bureResult);
temphead += 8;
tmpLen -= 8;
bitStart += 64;
}while (tmpLen > 0);
BL_TRACE("burn secure en bit...and reset\n");
uint8_t en = 1;
EFuseSWBurn(145, 1, &en); // burn secure en bit
*(volatile uint32_t*)0x4f02000c |= 1;//send reset command in bootrom
Flash_NVICSwReset();
}
else
{
BL_TRACE("secure en bit has set. bl pubkey:\n");
uint8_t readBlKey[56] = {0};
for(int i=0; i<7; i++)
{
efuseSWReadSafePolling(16+i*2, 2, readBlKey+i*8); //read ecdsa key
}
for(int j=0; j<2; j++){
for(int k=0; k<28; k++)
{
BL_TRACE("0x%x,",readBlKey[k+28*j]);
}
BL_TRACE("\n");
}
if(memcmp(&readBlKey[0], pBlKey, sizeof(readBlKey)) == 0){
BL_TRACE("check bl pubkey success\n");
}
}
BL_TRACE("start secure boot process\n");
//load ih from flash
uint32_t RetValue = LoadVerifyImageHead();
if (RetValue != NoError)
{
return RetValue;
}
//load image from flash
RetValue = LoadVerifyImageBody();
if (RetValue != NoError)
{
return RetValue;
}
}
#endif
//BSP_QSPI_XIP_Mode_Enable(0);
BL_CustomDeInit();
BSP_DeInit();
DisableICache();
#ifdef TYPE_EC718M
/*
Bootloader should to clean PSRAM-P0-Cache
due to PSRAM-P0 used to decompress code.
*/
extern BOOL PCacheCleanAll(uint8_t inst);
PCacheCleanAll(0);
#endif
__DSB();
__ISB();
#if (!defined FPGA_TEST && !defined SOC_TEST)
// 718m fpga bringup
BSP_apAccCmsbDisEn();
#endif
Bltransfer_Control(AP_FLASH_LOAD_ADDR);
while(1);
}
PLAT_BL_UNCOMP_FLASH_TEXT void NMI_Handler()
{
BL_TRACE("WDT timeout!!! Enter NMI Handler!!!\r\n");
while(1);
}
PLAT_BL_UNCOMP_FLASH_TEXT void MemManage_Handler()
{
while(1);
}
PLAT_BL_UNCOMP_FLASH_TEXT void BusFault_Handler()
{
while(1);
}
PLAT_BL_UNCOMP_FLASH_TEXT void UsageFault_Handler()
{
while(1);
}
PLAT_BL_UNCOMP_FLASH_TEXT void DebugMon_Handler()
{
while(1);
}
PLAT_BL_UNCOMP_FLASH_TEXT void SVC_Handler()
{
}
PLAT_BL_UNCOMP_FLASH_TEXT void PendSV_Handler()
{
}
PLAT_BL_UNCOMP_FLASH_TEXT void SysTick_Handler()
{
}
#if (WDT_FEATURE_ENABLE == 1)
/*
* WDT Initialize, wdt timeout value is 20s
* Parameter: none
*/
PLAT_BL_CIRAM_FLASH_TEXT void BSP_WdtInit(void)
{
// Config WDT clock, source from 40KHz and divide by WDT_TIMEOUT_VALUE
GPR_setClockSrc(FCLK_WDG, FCLK_WDG_SEL_40K);
GPR_setClockDiv(FCLK_WDG, WDT_TIMEOUT_VALUE);
WdtConfig_t wdtConfig;
wdtConfig.mode = WDT_INTERRUPT_RESET_MODE;
wdtConfig.timeoutValue = 40000U;
WDT_init(&wdtConfig);
}
#endif
PLAT_BL_CIRAM_FLASH_TEXT void BL_SetUartPinmuxAndClk(void)
{
// Pin initialize
PadConfig_t config;
PAD_getDefaultConfig(&config);
config.mux = RTE_UART0_TX_FUNC;
PAD_setPinConfig(RTE_UART0_TX_BIT, &config);
config.mux = RTE_UART1_TX_FUNC;
PAD_setPinConfig(RTE_UART1_TX_BIT, &config);
config.pullSelect = PAD_PULL_INTERNAL;
config.pullUpEnable = PAD_PULL_UP_ENABLE;
config.pullDownEnable = PAD_PULL_DOWN_DISABLE;
config.mux = RTE_UART0_RX_FUNC;
PAD_setPinConfig(RTE_UART0_RX_BIT, &config);
config.mux = RTE_UART1_RX_FUNC;
PAD_setPinConfig(RTE_UART1_RX_BIT, &config);
GPR_clockDisable(FCLK_UART0);
GPR_setClockSrc(FCLK_UART0, FCLK_UART0_SEL_26M);
GPR_clockDisable(FCLK_UART1);
GPR_setClockSrc(FCLK_UART1, FCLK_UART1_SEL_26M);
}
PLAT_BL_CIRAM_FLASH_TEXT void vcomUrcPutChar(uint8_t vcomNo, uint8_t *buff, uint32_t size)
{
#ifdef FEATURE_FOTA_USBURC_ENABLE
int vcom_app_send_proc(uint8_t vcom_num, uint8_t* sndbuf_ptr, uint32_t size, uint8_t timeout);
vcom_app_send_proc(vcomNo, (uint8_t*)buff, 1, 50);
#endif
}
PLAT_BL_CIRAM_FLASH_TEXT void URCPutChar(int ch)
{
if (URCSelSerlType == URCUart1PrintType)
{
if(UsartUrcPortIdx != PORT_USART_INVALID)
{
UART_send(UsartUrcPortIdx, (uint8_t*)&ch, 1, 0xFFFFFFFF);
}
}
else if(URCSelSerlType >= URCVCom0PrintType)
{
vcomUrcPutChar(URCSelSerlType - URCVCom0PrintType, (uint8_t*)&ch, 1);
}
}
/*
* retarget for _write implementation
* Parameter: ch: character will be out
*/
PLAT_BL_CIRAM_FLASH_TEXT void LOGPutChar(uint8_t ch)
{
if(UsartLogPortIdx != PORT_USART_INVALID)
{
UART_send(UsartLogPortIdx, (uint8_t*)&ch, 1, 0xFFFFFFFF);
}
}
#if defined ( __GNUC__ )
/*
* retarget for _write implementation
* Parameter: ch: character will be out
*/
PLAT_BL_CIRAM_FLASH_TEXT int io_putchar(int ch)
{
if(URCEnable && URCPrintActive)
{
URCPutChar(ch);
}
else
{
LOGPutChar(ch);
}
return 0;
}
/*
* retarget for _read implementation
* Parameter: ch: character will be read
*/
PLAT_BL_CIRAM_FLASH_TEXT int io_getchar()
{
uint8_t ch = 0;
if(UsartLogPortIdx != PORT_USART_INVALID)
{
UART_receive(UsartLogPortIdx, (uint8_t*)&ch, 1, 0xFFFFFFFF);
}
return (ch);
}
__attribute__((weak,noreturn)) void __aeabi_assert (const char *expr, const char *file, int line)
{
BL_TRACE("Assert, expr:%s, file: %s, line: %d\r\n", expr, file, line);
while(1);
}
void __assert_func(const char *filename, int line, const char *assert_func, const char *expr)
{
BL_TRACE("Assert, expr:%s, file: %s, line: %d\r\n", expr, filename, line);
while(1);
}
#elif defined (__CC_ARM)
/*
* retarget for printf implementation
* Parameter: ch: character will be out
* f: not used
*/
int fputc(int ch, FILE *f)
{
LOGPutChar(ch)
return 0;
}
/*
* retarget for scanf implementation
* Parameter: f: not used
*/
int fgetc(FILE *f)
{
uint8_t ch = 0;
if(UsartLogPortIdx != PORT_USART_INVALID)
{
UART_receive(UsartLogPortIdx, (uint8_t*)&ch, 1, 0xFFFFFFFF);
}
return (ch);
}
__attribute__((weak,noreturn)) void __aeabi_assert (const char *expr, const char *file, int line)
{
BL_TRACE("Assert, expr:%s, file: %s, line: %d\r\n", expr, file, line);
while(1);
}
#endif
/*
* URC set enable and baudrate value config
* Parameter: enable uart1 init for urc, 0-disable, 1-enable
* Parameter: baudrate for UART1(URC)
*/
PLAT_BL_CIRAM_FLASH_TEXT void BSP_URCSetCfg(uint8_t enable, uint32_t baud, URCSelPrintType serlType, uint8_t serlIdx)
{
URCEnable = enable;
URCBaudValue = baud;
URCSelSerlType = serlType;
URCSelSerlIdx = serlIdx;
if(serlType == URCUart1PrintType)
{
UsartUrcPortIdx = PORT_USART_0 + serlIdx;
}
}
PLAT_BL_CIRAM_FLASH_TEXT void SelNormalOrURCPrint(uint32_t Sel)
{
if(URCEnable==0)
{
return;
}
URCPrintActive = Sel;
}
/*
* FUNCTION :BL_CustomInit, called at start of BSP_Init
*/
PLAT_BL_CIRAM_FLASH_TEXT void BL_CustomInit(void)
{
URCSelPrintType serlType = URCUart1PrintType;
uint32_t urcBaud = 115200;
uint8_t portType = FOTA_DFT_URC_PORT_TYPE;
uint8_t portIdx = 0;
uint8_t portSel = (portType << 4) | portIdx;
#if (WDT_FEATURE_ENABLE == 1)
BSP_WdtInit();
WDT_start();
#endif
BSP_LoadPlatConfigFromRawFlash();
urcBaud = BSP_GetPlatConfigItemValue(PLAT_CONFIG_ITEM_AT_PORT_BAUDRATE);
if(!urcBaud || urcBaud == 0xffffffff)
{
urcBaud = 115200;
}
portSel = (uint8_t)BSP_GetPlatConfigItemValue(PLAT_CONFIG_ITEM_FOTA_URC_PORT_SEL);
portType = (portSel >> 4);
portIdx = (portSel & 0xf);
if(portType >= PLAT_CFG_FOTA_URC_PORT_MAXTYPE)
{
portType = FOTA_DFT_URC_PORT_TYPE;
}
if(portType == PLAT_CFG_FOTA_URC_PORT_USB)
{
#ifdef FEATURE_FOTA_USBURC_ENABLE
if(portIdx > PLAT_CFG_FOTA_URC_USB_PORT_IDX_MAX)
{
portIdx = 0; /* default portIdx of USB */
}
serlType = URCVCom0PrintType + portIdx;
#else
/* set it to 'uart1' */
serlType = URCUart1PrintType;
portIdx = 1;
#endif
}
else
{
if(portIdx > PLAT_CFG_FOTA_URC_UART_PORT_IDX_MAX)
{
portIdx = 1; /* default portIdx of UART */
}
}
BSP_URCSetCfg(1, urcBaud, serlType, portIdx);
BL_SetUartPinmuxAndClk();
uartPortFrameFormat_t fmt = {.dataBits = 8,
.parity = 0,
.stopBits = 1,
.flowControl = 0
};
UART_init(UsartLogPortIdx, &fmt, 115200ul);
if(serlType == URCUart1PrintType)
{
UART_init(UsartUrcPortIdx, &fmt, urcBaud);
}
#if defined ( __GNUC__ )
// Disable I/O buffering for stdout, so chars are sent out as soon as they are printed
//setvbuf(stdout, NULL, _IONBF, 0);
#endif
}
PLAT_BL_CIRAM_FLASH_TEXT void BL_CustomDeInit(void)
{
UART_Deinit(UsartLogPortIdx);
UART_Deinit(UsartUrcPortIdx);
#if (WDT_FEATURE_ENABLE == 1)
WDT_stop();
WDT_deInit();
#endif
}
/*
* FUNCTION :main
*/
PLAT_BL_CIRAM_FLASH_TEXT int ec_main(void)
{
uint32_t RetValue = NoError;
BSP_Init();
BL_CustomInit();
//void vcom_urc_test_entry(void);
//vcom_urc_test_entry();
if(pwrKeyGetPwrKeyMode() == PWRKEY_PWRON_MODE)
pwrkeyPwrOnDebounce(2000);
#ifdef FEATURE_FOTA_ENABLE
//fotaEnable = (uint8_t)BSP_GetPlatConfigItemValue(PLAT_CONFIG_ITEM_FOTA_CONTROL);
//if(fotaEnable == 1)
{
extern void decompressGetAddrInfo(void);
decompressGetAddrInfo();
FotaProcedure();
}
#endif
RetValue = SystemXIPNormalBoot();
if (RetValue != NoError)
{
BL_TRACE("bootloader try normal boot system failed(0x%x)!\n", RetValue);
}
while(1);
}
PLAT_BL_AIRAM_PRE2_TEXT void Bltransfer_Control(uint32_t p_base_addr)
{
uint32_t *msp_addr = (uint32_t *)p_base_addr;
typedef void *jmp_fun(void);
__set_MSP(*msp_addr);
jmp_fun *jump = (jmp_fun *)(*(msp_addr+1));
(*jump)();
}

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@ -1,93 +0,0 @@
#include <string.h>
#include "cmsis_os2.h" // ::CMSIS:RTOS2
#include "slpman.h"
#include "plat_config.h"
#include "sctdef.h"
#ifndef IS_IRQ_MODE
#define IS_IRQ_MODE() (__get_IPSR() != 0U)
#endif
PLAT_BL_CIRAM_FLASH_TEXT osStatus_t osSemaphoreAcquire (osSemaphoreId_t semaphore_id, uint32_t timeout) {
return (osStatus_t)0;
}
PLAT_BL_CIRAM_FLASH_TEXT osStatus_t osSemaphoreDelete (osSemaphoreId_t semaphore_id) {
return (osStatus_t)0;
}
PLAT_BL_CIRAM_FLASH_TEXT osSemaphoreId_t osSemaphoreNew (uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr) {
return 0;
}
PLAT_BL_CIRAM_FLASH_TEXT osStatus_t osSemaphoreRelease (osSemaphoreId_t semaphore_id) {
return (osStatus_t)0;
}
PLAT_BL_CIRAM_FLASH_TEXT slpManRet_t slpManRegisterPredefinedBackupCb(slpCbModule_t module, slpManBackupCb_t backup_cb, void *pdata)
{
return (slpManRet_t)0;
}
PLAT_BL_CIRAM_FLASH_TEXT slpManRet_t slpManRegisterPredefinedRestoreCb(slpCbModule_t module, slpManRestoreCb_t restore_cb, void *pdata)
{
return (slpManRet_t)0;
}
PLAT_BL_CIRAM_FLASH_TEXT void PhyDebugPrint(uint8_t moduleID, uint8_t subID, uint32_t *pSwLogData, uint32_t swLogLen, uint8_t uniLogLevel, uint8_t ramLogSwitch)
{
return;
}
PLAT_BL_CIRAM_FLASH_TEXT slpManRet_t slpManDrvVoteSleep(slpDrvVoteModule_t module, slpManSlpState_t status)
{
return (slpManRet_t)0;
}
PLAT_BL_CIRAM_FLASH_TEXT char *pcTaskGetName( osThreadId_t xTaskToQuery )
{
return NULL;
}
PLAT_BL_CIRAM_FLASH_TEXT osThreadId_t xTaskGetCurrentTaskHandle( void )
{
return (osThreadId_t)NULL;
}
PLAT_BL_CIRAM_FLASH_TEXT osStatus_t osDelay (uint32_t ticks)
{
return (osStatus_t)0;
}
PLAT_BL_CIRAM_FLASH_TEXT osKernelState_t osKernelGetState (void)
{
return (osKernelState_t)0;
}
PLAT_BL_CIRAM_FLASH_TEXT uint8_t osThreadIsSuspendAll (void)
{
return 0;
}
PLAT_BL_CIRAM_FLASH_TEXT uint8_t PhyLogLevelGet (void)
{
return 0;
}
PLAT_BL_UNCOMP_FLASH_TEXT void STUB_WakeupIntHandler(void)
{
}
PLAT_BL_UNCOMP_FLASH_TEXT void PwrKey_WakeupIntHandler()
{
}
PLAT_BL_UNCOMP_FLASH_TEXT void ChrgPad_WakeupIntHandler()
{
}

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@ -1,328 +0,0 @@
/**************************************************************************//**
* @file system_ARMCM3.c
* @brief CMSIS Device System Source File for
* ARMCM3 Device Series
* @version V5.00
* @date 07. September 2016
******************************************************************************/
/*
* Copyright (c) 2009-2016 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*----------------------------------------------------------------------------*
* INCLUDES *
*----------------------------------------------------------------------------*/
#include "ec7xx.h"
#include "mpu_armv7.h"
#include "Driver_Common.h"
#include "cache.h"
#include "mem_map.h"
#include "slpman.h"
#include "bl_bsp.h"
#ifdef RAMCODE_COMPRESS_EN
#include "LzmaEc.h"
#endif
#include "sctdef.h"
#ifdef TYPE_EC718M
#include "xpi_psram.h"
#endif
/*----------------------------------------------------------------------------*
* MACROS *
*----------------------------------------------------------------------------*/
#define CORE_CLOCK_SEL_ADDRESS (0x4f000020)
/*----------------------------------------------------------------------------*
* DATA TYPE DEFINITION *
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------*
* GLOBAL VARIABLES *
*----------------------------------------------------------------------------*/
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
#if defined(__CC_ARM)
extern uint32_t __Vectors;
#elif defined(__GNUC__)
extern uint32_t __isr_vector;
#endif
#endif
#ifdef TYPE_EC718M
RAM_BOOT_NOINIT uint32_t SystemCoreClock = 0;
#else
uint32_t SystemCoreClock = 0;
#endif
/*----------------------------------------------------------------------------*
* PRIVATE FUNCTION DECLEARATION *
*----------------------------------------------------------------------------*/
extern void CopyPre1RamtoImage(void);
extern void CopyPre2RamtoImage(void);
extern void CopyRWDataFromBin(void);
extern void SetZIDataToZero(void);
extern void CopyOtherCodetoImage(void);
extern void SystemXIPFastBoot(void);
extern void GPR_SetClkCc(void);
extern void GPR_setflashClockPreInit(uint8_t div);
extern void flashMirrorInitandChk( void );
extern void trimEfuseAon( void );
extern void pwrKeyStoreFirstPwrOnFlag(void);
#ifdef TYPE_EC718M
extern void SetBootZIDataToZero(void);
extern uint8_t XPSRAM_init(void);
extern void PAD_setDefaultDrvStrength0(void);
extern void trimLdoPsram( void );
#endif
/*----------------------------------------------------------------------------*
* PRIVATE FUNCTIONS *
*----------------------------------------------------------------------------*/
/**
\fn sysROAddrCheck(uint32_t addr)
\brief This function is called in flash erase or write apis to prevent
unexpected access the bootloader image read only area..
\param[in] Addr: flash erase or write addr
\note Be careful if you want change this function.
*/
PLAT_BL_UNCOMP_FLASH_TEXT static uint8_t sysROAddrCheck(uint32_t addr)
{
//protect 2 hdr
#ifdef CONFIG_PROJ_APP_SECURITY_BOOT
if(addr <(SYS_SEC_HAED_ADDR))
#else
if(addr <(FUSE_FLASH_MIRROR_ADDR))
#endif
{
return 1;
}
//protect bl
if((addr >=(BOOTLOADER_FLASH_LOAD_ADDR-AP_FLASH_XIP_ADDR))
&& (addr <(BOOTLOADER_FLASH_LOAD_ADDR+BOOTLOADER_FLASH_LOAD_SIZE-AP_FLASH_XIP_ADDR)))
{
return 1;
}
return 0;
}
/*----------------------------------------------------------------------------*
* GLOBAL FUNCTIONS *
*----------------------------------------------------------------------------*/
/**
\fn sysROSpaceCheck(uint32_t addr, uint32_t size)
\brief This function is called in flash erase or write apis to prevent
unexpected access the bootloader image read only area..
\param[in] Addr: flash erase or write addr
Addr: flash erase or write size
\note Be careful if you want change this function.
*/
PLAT_BL_UNCOMP_FLASH_TEXT uint8_t sysROSpaceCheck(uint32_t addr, uint32_t size)
{
if(sysROAddrCheck(addr))
{
return 1;
}
if (sysROAddrCheck(addr+size - 1))
{
return 1;
}
return 0;
}
/*----------------------------------------------------------------------------
System Core Clock update function
*----------------------------------------------------------------------------*/
#ifdef TYPE_EC718M
PLAT_UNCOMP_FLASH_TEXT void SystemCoreClockUpdate (void)
#else
PLAT_BL_CIRAM_FLASH_TEXT void SystemCoreClockUpdate (void)
#endif
{
#if (defined FPGA_TEST || defined SOC_TEST)
SystemCoreClock = 102400000;
#else
switch((*((uint32_t *)CORE_CLOCK_SEL_ADDRESS)) & 0x3)
{
case 0:
SystemCoreClock = 26000000U;
break;
case 1:
#if defined TYPE_EC718M
if((*((uint32_t *)CORE_CLOCK_SEL_ADDRESS)) & (0x1 << 15))
{
if((*((uint32_t *)CORE_CLOCK_SEL_ADDRESS)) & (0x1 << 12))
{
SystemCoreClock = 409600000U;
}
else
{
SystemCoreClock = 307200000U;
}
}
else
{
SystemCoreClock = 204800000U;
}
break;
#else
if((*((uint32_t *)CORE_CLOCK_SEL_ADDRESS)) & (0x1 << 15))
{
SystemCoreClock = 307200000U;
}
else
{
SystemCoreClock = 204800000U;
}
break;
#endif
case 2:
SystemCoreClock = 102400000U;
break;
case 3:
SystemCoreClock = 32768U;
break;
}
#endif
}
/* make sure the ramcode is not inlined
set as soon as possiable, so need a seperate section for the setting ramode
*/
PLAT_BL_AIRAM_PRE1_TEXT void SetFlashCoreClkPreInitInBl(void)
{
uint32_t delay_loop = 0x10;
GPR_SetClkCc();
#if (defined CHIP_EC718) && (defined TYPE_EC718M)
#if (defined FPGA_TEST || defined SOC_TEST)
GPR_setflashClockPreInit(3);//70/3=23M
#else
GPR_setflashClockPreInit(6);//612/6=102M
#endif
#elif (defined CHIP_EC718) && !(defined TYPE_EC718M)
GPR_setflashClockPreInit(7);//612/7=87M
#elif defined CHIP_EC716
GPR_setflashClockPreInit(6);//612/6=102M
#endif
while(delay_loop--);
}
/*----------------------------------------------------------------------------
System initialization function
*----------------------------------------------------------------------------*/
extern void decompressRamCodeGetAddrInfo(void);
PLAT_BL_UNCOMP_FLASH_TEXT void SystemInit (void)
{
DisableICache();
EnableICache();
// Fix bug that UART0 IER is enabled in bootrom
USART_0->IER = 0;
#ifdef TYPE_EC718M
*(volatile uint32_t *)(0x4f0200c0) = (*(volatile uint32_t *)(0x4f0200c0)) & (~(1<<10)); //analog: dcdc11 bypass off
PAD_setDefaultDrvStrength0();
#endif
CopyPre1RamtoImage();
SetFlashCoreClkPreInitInBl();
CopyPre2RamtoImage();
if ((*(uint32_t *)0x4f0201A0)&0xe0)//wakeup
{
#ifdef TYPE_EC718M
SystemCoreClockUpdate();
XPSRAM_init();
XPSRAM_postSleepFlow();
#endif
if (SystemWakeUpBootInit()==TRUE)
{
SystemXIPFastBoot();
}
}
#if (!defined FPGA_TEST && !defined SOC_TEST)
BSP_apAccCmsbEn();
#endif
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
#if defined(__CC_ARM)
SCB->VTOR = (uint32_t) &__Vectors;
#elif defined (__GNUC__)
SCB->VTOR = (uint32_t) &__isr_vector;
#endif
#endif
#ifdef TYPE_EC718M
SetBootZIDataToZero();
SystemCoreClockUpdate();
trimLdoPsram();
XPSRAM_init();
XPSRAM_setRetMode(false, XPSRAM_RET_SLEEP1);
#endif
#ifdef RAMCODE_COMPRESS_EN
decompressRamCodeGetAddrInfo();
#endif
CopyOtherCodetoImage();
/*move the RW data in the image to its excution region*/
CopyRWDataFromBin();
/*append the ZI region. TODO: maybe ZI data need not to be 0,
random value maybe aslo fine for application, if so we could
remove this func call, since it takes a lot of time*/
SetZIDataToZero();
SystemNormalBootInit();
#ifndef TYPE_EC718M
SystemCoreClockUpdate();
#endif
#if defined CHIP_EC718
flashMirrorInitandChk();//only check when por
#endif
pwrKeyStoreFirstPwrOnFlag();
trimEfuseAon();//set to aon only when por, and aon clock should default en
}

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@ -1,752 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_PSRAM_ENABLE = n
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
DRIVER_APM_ENABLE = y
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
BUILD_AT_QA = n
ifeq ($(BUILD_AT_QA), y)
BUILD_QA_TEST_AT_ENABLE = y
BUILD_QA_TEST_GPIO_ENABLE = y
BUILD_QA_TEST_CHRG_ENABLE = y
endif
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECIDLEP
BUILD_PLAT_MISC_ECIDLEP_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = n
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

View File

@ -1,763 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_PSRAM_ENABLE = y
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
DRIVER_FLASHEX_ENABLE = n
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = n
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = n
BUILD_AT_DEBUG = n
BUILD_AT_REF = n
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = n
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_JPEGCODEC_ENABLE = n
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = n
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
ifeq ($(AUDIO_FIX_SRC_ENABLE), y)
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
else
BUILD_FIXED_AUDIO_SOURCE_ENABLE = n
endif
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECPRFINFO
BUILD_PLAT_MISC_ECPRFINFO_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBLOCKPLMNLIST
BUILD_PS_DEV_ECBLOCKPLMNLIST_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = y
else
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
endif
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
#AT+ECEHPLMNLIST
BUILD_PS_EMM_ECEHPLMNLIST_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = y
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = y
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = y
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = y
else
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
endif
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

View File

@ -1,780 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_PSRAM_ENABLE = n
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
DRIVER_APM_ENABLE = y
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_JPEGCOMP_ENABLE = n
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
BUILD_AT_QA = n
ifeq ($(BUILD_AT_QA), y)
BUILD_QA_TEST_AT_ENABLE = y
BUILD_QA_TEST_GPIO_ENABLE = y
BUILD_QA_TEST_CHRG_ENABLE = y
endif
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
#AT+ECPRFINFO
BUILD_PLAT_MISC_ECPRFINFO_ENABLE = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
#AT+ECPRFINFO
BUILD_PLAT_MISC_ECPRFINFO_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
ifeq ($(AUDIO_FIX_SRC_ENABLE), y)
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
else
BUILD_FIXED_AUDIO_SOURCE_ENABLE = n
endif
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = y
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = y
else
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
endif
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
ifeq ($(IMS_MODE_ENABLE), y)
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = y
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = y
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = y
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = y
else
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
endif
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

View File

@ -1,747 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_PSRAM_ENABLE = y
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECIDLEP
BUILD_PLAT_MISC_ECIDLEP_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBLOCKPLMNLIST
BUILD_PS_DEV_ECBLOCKPLMNLIST_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
#AT+ECEHPLMNLIST
BUILD_PS_EMM_ECEHPLMNLIST_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

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@ -1,752 +0,0 @@
#BIN_COMPRESS for post bin compress tool
#THIRDPARTY_LZMA_ENABLE LZMA feature compile en
#RAMCODE_COMPRESS_EN ramcode/RW decompress, used in code
#REL_COMPRESS_EN calibration back up compress en, used in code
CFLAGS_DEFS += -DRAMCODE_COMPRESS_EN
CFLAGS_DEFS += -DREL_COMPRESS_EN
THIRDPARTY_LZMA_ENABLE = y
BIN_COMPRESS = y
DRIVER_CPFLASH_ENABLE = n
DRIVER_VPU_ENABLE = y
DRIVER_EEPROM_ENABLE = n
DRIVER_SPI_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_PSRAM_ENABLE = n
DRIVER_PCACHE_ENABLE = y
DRIVER_EXSTORAGE_ENABLE = n
#DRIVER_LPUART_ENABLE = n
DRIVER_ONEWIRE_ENABLE = n
DRIVER_APM_ENABLE = y
THIRDPARTY_PING_ENABLE = y
THIRDPARTY_YRCOMPRESS_ENABLE = y
THIRDPARTY_MMVIDEO_ENABLE = y
THIRDPARTY_MMJPEG_ENABLE = y
MIDDLEWARE_USB_CCID_ENABLE = n
MIDDLEWARE_FOTAPAR_ENABLE = y
MIDDLEWARE_FOTA_FS_ENABLE = n
BUILD_EC_MW = n
AT_EXAMPLE_ENABLE = n
#should always enable, default compiled in lib
DRIVER_ACVOICE_ENG_ENABLE = y
#Exception Flash Dump enable, default enable
EXCEPTION_FLASH_DUMP_ENABLE = y
BUILD_AT_QA = n
ifeq ($(BUILD_AT_QA), y)
BUILD_QA_TEST_AT_ENABLE = y
BUILD_QA_TEST_GPIO_ENABLE = y
BUILD_QA_TEST_CHRG_ENABLE = y
endif
ifneq ($(OPENCPU_MODE_ENABLE), y)
THIRDPARTY_IPERF_ENABLE = y
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_HTTPC_ENABLE = y
MBEDTLS_WITH_HTTP_TLS = y
THIRDPARTY_MQTT_ENABLE = y
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT
THIRDPARTY_CJSON_ENABLE = y
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = y
BUILD_AT = y
BUILD_AT_DEBUG = y
BUILD_AT_REF = y
else
#>>>'OPENCPU_MODE_ENABLE' STARTING...
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_IMS = y
BUILD_PS_ROHC_ENABLE = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_IMS = y
THIRDPARTY_CJSON_ENABLE = y
endif
ifeq ($(AUDIO_MODE_ENABLE), y)
MIDDLEWARE_AMR_ENABLE = y
MIDDLEWARE_VEM_ENABLE = y
DRIVER_VEM_CFG_ENABLE = y
DRIVER_I2C_ENABLE = y
DRIVER_CODEC_ENABLE = y
DRIVER_CODEC8311_ENABLE = y
DRIVER_CODEC8374_ENABLE = y
DRIVER_AUDIO_EX_STORGE_ENABLE = n
ifeq ($(DRIVER_AUDIO_EX_STORGE_ENABLE), y)
DRIVER_AUDIO_EX_SDCARD_ENABLE = y
DRIVER_AUDIO_EX_FLASH_ENABLE = y
CFLAGS += -DFEATURE_AUDIO_EX_STORAGE_ENABLE
endif
BUILD_SUPPORT_APP_PCM_MEM_POOL = y
endif
THIRDPARTY_PPP_ENABLE = n
THIRDPARTY_IPERF_ENABLE = n
THIRDPARTY_LIBSNTP_ENABLE = y
THIRDPARTY_MBEDTLS_ENABLE = n
THIRDPARTY_HTTPC_ENABLE = n
MBEDTLS_WITH_HTTP_TLS = n
THIRDPARTY_MQTT_ENABLE = n
MBEDTLS_WITH_MQTT_TLS = n
#cjson is refered by MQTT, cjson defult value: n, as IMS also need it, here remove it
#THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_CTCC_DM_ENABLE = n
THIRDPARTY_CUCC_DM_ENABLE = n
THIRDPARTY_CMCC_DM_ENABLE = n
THIRDPARTY_CTWING_CERTI_ENABLE = n
BUILD_PS_TCPIP_API_ENABLE = n
BUILD_AT = y
BUILD_AT_DEBUG = n
BUILD_AT_REF = y
##################################################################################################################
##Description:
##global option for RIL APIs
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_RIL_AT_API_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for Plat AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PLAT_CUST_AT_ENABLE = y
ifeq ($(PWR_TEST), y)
BUILD_PLAT_MEM_AT_ENABLE = y
else
BUILD_PLAT_MEM_AT_ENABLE = n
endif
BUILD_PLAT_PMU_AT_ENABLE = y
BUILD_PLAT_PER_AT_ENABLE = y
BUILD_PLAT_MISC_AT_ENABLE = y
ifeq ($(IMS_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(IMS_SMSONLY_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_PROD_AT_ENABLE = y
else
BUILD_PLAT_PROD_AT_ENABLE = n
endif
BUILD_PLAT_FOTA_AT_ENABLE = y
BUILD_PLAT_ECOTA_AT_ENABLE = n
BUILD_PLAT_CMUX_AT_ENABLE = n
BUILD_PLAT_HTTP_AT_ENABLE = n
BUILD_PLAT_MQTT_AT_ENABLE = n
BUILD_PLAT_SSL_AT_ENABLE = n
ifeq ($(AUDIO_MODE_ENABLE), y)
BUILD_PLAT_AUDIO_AT_ENABLE = y
BUILD_PLAT_FS_AT_ENABLE = y
else
BUILD_PLAT_AUDIO_AT_ENABLE = n
BUILD_PLAT_FS_AT_ENABLE = n
endif
BUILD_PLAT_ONENET_AT_ENABLE = n
BUILD_PLAT_CTLWM2M_AT_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_AUDIO_AT_ENABLE
##global option for Plat audio related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_AUDIO_AT_ENABLE), y)
#AT+ADCFG
BUILD_PLAT_AUDIO_ECADCFG_ENABLE = y
BUILD_FIXED_AUDIO_SOURCE_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_CUST_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_CUST_AT_ENABLE), y)
#AT+CGMI
BUILD_PLAT_CUST_CGMI_ENABLE = y
#AT+CGMM
BUILD_PLAT_CUST_CGMM_ENABLE = y
#AT+GMM
BUILD_PLAT_CUST_GMM_ENABLE = y
#AT+CGMR
BUILD_PLAT_CUST_CGMR_ENABLE = y
#AT+CGSN
BUILD_PLAT_CUST_CGSN_ENABLE = y
#ATI
BUILD_PLAT_CUST_ATI_ENABLE = y
#AT&W
BUILD_PLAT_CUST_ATnW_ENABLE = y
#AT&F
BUILD_PLAT_CUST_ATnF_ENABLE = y
#AT&V
BUILD_PLAT_CUST_ATnV_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_MEM_AT_ENABLE
##global option for Plat memory related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MEM_AT_ENABLE), y)
#AT+ECSHOWMEM
BUILD_PLAT_MEM_ECSHOWMEM_ENABLE = y
#AT+ECHEAPINFO
BUILD_PLAT_MEM_ECHEAPINFO_ENABLE = y
#AT+ECMEM32
BUILD_PLAT_MEM_ECMEM32_ENABLE = y
#AT+ECDLFCMEM
BUILD_PLAT_MEM_ECDLFCMEM_ENABLE = y
#AT+ECFSINFO
BUILD_PLAT_MEM_ECFSINFO_ENABLE = y
#AT+RLCHK
BUILD_PLAT_MEM_RLCHK_ENABLE = y
#AT+ECFLASHMONITORINFO
BUILD_PLAT_MEM_ECFLASHMONITORINFO_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PMU_AT_ENABLE
##global option for Plat pmu related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PMU_AT_ENABLE), y)
#AT+ECPMUCFG
BUILD_PLAT_PMU_ECPMUCFG_ENABLE = y
#AT+ECSYSMONCFG
BUILD_PLAT_PMU_ECSYSMONCFG_ENABLE = y
#AT+ECVOTECHK
BUILD_PLAT_PMU_ECVOTECHK_ENABLE = y
#AT+ECPMUSTATUS
BUILD_PLAT_PMU_ECPMUSTATUS_ENABLE = n
#AT+ECPURC
BUILD_PLAT_PMU_ECPURC_ENABLE = y
#AT+ECSCLK
BUILD_PLAT_PMU_ECSCLK_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_PER_AT_ENABLE
##global option for Plat peripheral related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PER_AT_ENABLE), y)
#AT+IPR
BUILD_PLAT_PER_IPR_ENABLE = y
#AT+ICF
BUILD_PLAT_PER_ICF_ENABLE = n
#AT+IFC
BUILD_PLAT_PER_IFC_ENABLE = n
#AT+ECUSBSYS
BUILD_PLAT_PER_ECUSBSYS_ENABLE = n
#AT+ECLEDMODE
BUILD_PLAT_PER_ECLEDMODE_ENABLE = n
#AT+ECPALARM
BUILD_PLAT_PER_ECPALARM_ENABLE = n
#AT+ECADC
BUILD_PLAT_PER_ECADC_ENABLE = n
endif
##################################################################################################################
##Description: BUILD_PLAT_MISC_AT_ENABLE
##global option for Plat miscellaneous AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_MISC_AT_ENABLE), y)
#AT+ECPCFG
BUILD_PLAT_MISC_ECPCFG_ENABLE = y
#AT+ECRST
BUILD_PLAT_MISC_ECRST_ENABLE = y
#AT+ECPOWD
BUILD_PLAT_MISC_ECPOWD_ENABLE = n
#AT^SYSTEST
BUILD_PLAT_MISC_SYSTEST_ENABLE = n
#AT+ECSYSTEST
BUILD_PLAT_MISC_ECSYSTEST_ENABLE = n
#AT+ECTASKINFO
BUILD_PLAT_MISC_ECTASKINFO_ENABLE = n
#AT+ECTASKHISTINFO
BUILD_PLAT_MISC_ECTASKHISTINFO_ENABLE = n
#AT+ECLOGDBVER
BUILD_PLAT_MISC_ECLOGDBVER_ENABLE = n
#AT+ECDUMPCHK
BUILD_PLAT_MISC_ECDUMPCHK_ENABLE = n
#AT+ECBTOFFSETDBG
BUILD_PLAT_MISC_ECBTOFFSETDBG_ENABLE = n
#AT+ECFUSEMR
BUILD_PLAT_MISC_ECFUSEMR_ENABLE = n
#AT+ECSIMO
BUILD_PLAT_MISC_ECSIMO_ENABLE = n
#AT+ECIDLEP
BUILD_PLAT_MISC_ECIDLEP_ENABLE = y
endif
##################################################################################################################
##Description: BUILD_PLAT_PROD_AT_ENABLE
##global option for Plat product related AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PLAT_PROD_AT_ENABLE), y)
#AT+ECATE
BUILD_PLAT_PROD_ECATE_ENABLE = y
#AT+ECVERSION
BUILD_PLAT_PROD_ECVERSION_ENABLE = y
#AT+ECIPR
BUILD_PLAT_PROD_ECIPR_ENABLE = y
#AT+ECSLEEP
BUILD_PLAT_PROD_ECSLEEP_ENABLE = y
#AT+ECSAVEFAC
BUILD_PLAT_PROD_ECSAVEFAC_ENABLE = y
#AT+ECRFTEST
BUILD_PLAT_PROD_ECRFTEST_ENABLE = y
#AT+ECGMDATA
BUILD_PLAT_PROD_ECGMDATA_ENABLE = y
#AT+ECNPICFG
BUILD_PLAT_PROD_ECNPICFG_ENABLE = y
#AT+ECRFNST
BUILD_PLAT_PROD_ECRFNST_ENABLE = y
#AT+ECRFSTAT
BUILD_PLAT_PROD_ECRFSTAT_ENABLE = y
#AT+ECPRODMODE
BUILD_PLAT_PROD_ECPRODMODE_ENABLE = y
endif
##################################################################################################################
##Description:
##global option for PS AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT), y)
BUILD_PS_GEN_AT_ENABLE = y
BUILD_PS_DEV_AT_ENABLE = y
BUILD_PS_EMM_AT_ENABLE = y
BUILD_PS_EPS_AT_ENABLE = y
BUILD_PS_SIM_AT_ENABLE = y
BUILD_PS_SMS_AT_ENABLE = y
BUILD_PHY_CONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_ECSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE = n
BUILD_PS_TCPIP_NETCONFIG_AT_ENABLE = y
BUILD_PS_TCPIP_IPSEC_AT_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_GEN_AT_ENABLE
##Description:
##BUILD_PS_GEN_AT_ENABLE is to control whether include ps global AT commands as: AT/ATQ/ATE/ATT/ATV/ATL/ATM/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_GEN_AT_ENABLE), y)
#AT via BUILD_PS_GEN_AT_ENABLE
#ATQ
BUILD_PS_GEN_AT_Q_ENABLE = n
#ATE
BUILD_PS_GEN_AT_E_ENABLE = y
#ATT
BUILD_PS_GEN_AT_T_ENABLE = n
#ATV
BUILD_PS_GEN_AT_V_ENABLE = y
#ATL
BUILD_PS_GEN_AT_L_ENABLE = n
#ATM
BUILD_PS_GEN_AT_M_ENABLE = n
#ATS0
BUILD_PS_GEN_AT_S0_ENABLE = n
#AT&C
BUILD_PS_GEN_AT_nC_ENABLE = n
#AT&D
BUILD_PS_GEN_AT_nD_ENABLE = y
#ATD
BUILD_PS_GEN_AT_D_ENABLE = y
#ATO
BUILD_PS_GEN_AT_O_ENABLE = y
#ATH
BUILD_PS_GEN_AT_H_ENABLE = y
#ATA
BUILD_PS_GEN_AT_A_ENABLE = y
#AT+CSCS
BUILD_PS_GEN_CSCS_ENABLE = y
#AT+CMEE
BUILD_PS_GEN_CMEE_ENABLE = n
#AT+ECURC
BUILD_PS_GEN_ECURC_ENABLE = y
#AT+ECURCCFG
BUILD_PS_GEN_ECURCCFG_ENABLE = n
#AT+ECPPPHUP
BUILD_PS_GEN_ECPPPHUP_ENABLE = y
#AT+CLCK
BUILD_PS_GEN_CLCK_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_DEV_AT_ENABLE
##Description:
##BUILD_PS_DEV_AT_ENABLE is to control whether include ps global AT commands as: AT+CFUN/ECBAND/ECCFG/ECSTATUS/...etc
##Use method: y is support;n is not support.
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_DEV_AT_ENABLE), y)
#AT+CFUN
BUILD_PS_DEV_CFUN_ENABLE = y
#AT+ECCGSN
BUILD_PS_DEV_ECCGSN_ENABLE = y
#AT+ECCGSNLOCK
BUILD_PS_DEV_ECCGSNLOCK_ENABLE = n
#AT+ECSTATUS
BUILD_PS_DEV_ECSTATUS_ENABLE = y
#AT+ECSTATIS
BUILD_PS_DEV_ECSTATIS_ENABLE = n
#AT+ECBAND
BUILD_PS_DEV_ECBAND_ENABLE = y
#AT+ECFREQ
BUILD_PS_DEV_ECFREQ_ENABLE = y
#AT+ECCFG
BUILD_PS_DEV_ECCFG_ENABLE = y
#AT+ECMEASCFG
BUILD_PS_DEV_ECMEASCFG_ENABLE = n
#AT+ECRMFPLMN
BUILD_PS_DEV_ECRMFPLMN_ENABLE = y
#AT+ECBCINFO
BUILD_PS_DEV_ECBCINFO_ENABLE = y
#AT+ECPSTEST
BUILD_PS_DEV_ECPSTEST_ENABLE = n
#AT+ECEVENTSTATIS
BUILD_PS_DEV_ECEVENTSTATIS_ENABLE = n
#AT+ECNASTCFG
BUILD_PS_DEV_ECNASTCFG_ENABLE = y
#AT+ECWIFISCAN
BUILD_PS_DEV_ECWIFISCAN_ENABLE = n
#AT+ECBARCELL
BUILD_PS_DEV_ECBARCELL_ENABLE = y
#AT+ECJDC
BUILD_PS_DEV_ECJDC_ENABLE = n
#AT+ECNETDEVMAC
BUILD_PS_DEV_ECNETDEVMAC_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EMM_AT_ENABLE
##Description:
##BUILD_PS_EMM_AT_ENABLE is to control whether include ps mm AT commands as: AT+CESQ/COPS/CCIOTOPT/ECCESQS/...etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EMM_AT_ENABLE), y)
#AT+CSQ
BUILD_PS_EMM_CSQ_ENABLE = y
#AT+CESQ
BUILD_PS_EMM_CESQ_ENABLE = n
#AT+CREG
BUILD_PS_EMM_CREG_ENABLE = y
#AT+COPS
BUILD_PS_EMM_COPS_ENABLE = y
#AT+CPSMS
BUILD_PS_EMM_CPSMS_ENABLE = y
#AT+CEDRXS
BUILD_PS_EMM_CEDRXS_ENABLE = n
#AT+CEDRXRDP
BUILD_PS_EMM_CEDRXRDP_ENABLE = n
#AT+CCIOTOPT
BUILD_PS_EMM_CCIOTOPT_ENABLE = y
#AT+CRCES
BUILD_PS_EMM_CRCES_ENABLE = n
#AT+CCLK
BUILD_PS_EMM_CCLK_ENABLE = y
#AT+CTZR
BUILD_PS_EMM_CTZR_ENABLE = n
#AT+CTZU
BUILD_PS_EMM_CTZU_ENABLE = n
#AT+ECPLMNS
BUILD_PS_EMM_ECPLMNS_ENABLE = n
#AT+ECCESQSn
BUILD_PS_EMM_ECCESQS_ENABLE = n
#AT+ECPSMR
BUILD_PS_EMM_ECPSMR_ENABLE = n
#AT+ECPTWEDRXS
BUILD_PS_EMM_ECPTWEDRXS_ENABLE = n
#AT+ECEMMTIME
BUILD_PS_EMM_ECEMMTIME_ENABLE = n
#AT+ECPLMNRESELECT
BUILD_PS_EMM_ECPLMNRESELECT_ENABLE = n
#AT+ECCONNREL
BUILD_PS_EMM_ECCONNREL_ENABLE = n
#AT+ECMMER
BUILD_PS_EMM_ECMMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_EPS_AT_ENABLE
##Description:
##BUILD_PS_EPS_AT_ENABLE is to control whether include ESP AT commands as: AT+CGATT/CGDCONT/CGACT/CGCONTRDP/CGAUTH..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_EPS_AT_ENABLE), y)
#AT+CGATT
BUILD_PS_EPS_CGATT_ENABLE = y
#AT+ECEMCATT
BUILD_PS_EPS_ECEMCATT_ENABLE = n
#AT+CGDATA
BUILD_PS_EPS_CGDATA_ENABLE = n
#AT+CGTFT
BUILD_PS_EPS_CGTFT_ENABLE = n
#AT+CGCMOD
BUILD_PS_EPS_CGCMOD_ENABLE = n
#AT+CGEQOS
BUILD_PS_EPS_CGEQOS_ENABLE = n
#AT+CGDSCONT
BUILD_PS_EPS_CGDSCONT_ENABLE = n
#AT+CEMODE
BUILD_PS_EPS_CEMODE_ENABLE = y
#AT+CGDCONT
BUILD_PS_EPS_CGDCONT_ENABLE = y
#AT+CGACT
BUILD_PS_EPS_CGACT_ENABLE = y
#AT+CGEQOSRDP
BUILD_PS_EPS_CGEQOSRDP_ENABLE = n
#AT+CGCONTRDP
BUILD_PS_EPS_CGCONTRDP_ENABLE = n
#AT+CGSCONTRDP
BUILD_PS_EPS_CGSCONTRDP_ENABLE = n
#AT+CGTFTRDP
BUILD_PS_EPS_CGTFTRDP_ENABLE = n
#AT+CEREG
BUILD_PS_EPS_CEREG_ENABLE = y
#AT+CSCON
BUILD_PS_EPS_CSCON_ENABLE = n
#AT+CSODCP
BUILD_PS_EPS_CSODCP_ENABLE = n
#AT+CRTDCP
BUILD_PS_EPS_CRTDCP_ENABLE = n
#AT+CGAUTH
BUILD_PS_EPS_CGAUTH_ENABLE = n
#AT+CIPCA
BUILD_PS_EPS_CIPCA_ENABLE = n
#AT+CGAPNRC
BUILD_PS_EPS_CGAPNRC_ENABLE = n
#AT+CGEREP
BUILD_PS_EPS_CGEREP_ENABLE = n
#AT+CGPADDR
BUILD_PS_EPS_CGPADDR_ENABLE = y
#AT+CEER
BUILD_PS_EPS_CEER_ENABLE = n
#AT+CEVDP
BUILD_PS_EPS_CEVDP_ENABLE = n
#AT+CPSDO
BUILD_PS_EPS_CPSDO_ENABLE = n
#AT+ECCIOTPLANE
BUILD_PS_EPS_ECCIOTPLANE_ENABLE = n
#AT+ECSENDDATA
BUILD_PS_EPS_ECSENDDATA_ENABLE = n
#AT+ECGDCNT
BUILD_PS_EPS_ECGDCNT_ENABLE = n
#AT+ECAUGDCNT
BUILD_PS_EPS_ECAUGDCNT_ENABLE = n
#AT+ECSCLKEX
BUILD_PS_EPS_ECSCLKEX_ENABLE = n
#AT+ECSMER
BUILD_PS_EPS_ECSMER_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PS_SIM_AT_ENABLE
##Description:
##BUILD_PS_SIM_AT_ENABLE is to control whether include SIM AT commands as: AT+CIMI/CPIN/ECICCID/ECSIMCFG..etc
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SIM_AT_ENABLE), y)
#AT+CIMI
BUILD_PS_SIM_AT_CIMI_ENABLE = y
#AT+CPIN
BUILD_PS_SIM_AT_CPIN_ENABLE = y
#AT+ECICCID
BUILD_PS_SIM_AT_ECICCID_ENABLE = y
#AT+ECSIMCFG
BUILD_PS_SIM_AT_ECSIMCFG_ENABLE = y
#AT+CPWD
BUILD_PS_SIM_AT_CPWD_ENABLE = n
#AT+CPINR
BUILD_PS_SIM_AT_CPINR_ENABLE = n
#AT+ECSIMSLEEP
BUILD_PS_SIM_AT_ECSIMSLEEP_ENABLE = n
#AT+CSIM
BUILD_PS_SIM_AT_CSIM_ENABLE = n
#AT+CRSM
BUILD_PS_SIM_AT_CRSM_ENABLE = n
#AT+CCHO
BUILD_PS_SIM_AT_CCHO_ENABLE = n
#AT+CGLA
BUILD_PS_SIM_AT_CGLA_ENABLE = n
#AT+CCHC
BUILD_PS_SIM_AT_CCHC_ENABLE = n
#AT+ECSWC
BUILD_PS_SIM_AT_ECSWC_ENABLE = n
#AT+ECSIMRM
BUILD_PS_SIM_AT_ECSIMRM_ENABLE = y
#AT+CNUM
BUILD_PS_SIM_AT_CNUM_ENABLE = n
#AT+ECUSATP
BUILD_PS_SIM_AT_ECUSATP_ENABLE = n
#AT+CPOL
BUILD_PS_SIM_AT_CPOL_ENABLE = n
#AT+CPLS
BUILD_PS_SIM_AT_CPLS_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_SMS_AT_ENABLE
##Description:
##BUILD_PS_SMS_AT_ENABLE is to control whether include ps SMS AT commands as: AT+CMGS/CMGR/CMGW/CNMI/...etc
##Use method: y is support; n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_SMS_AT_ENABLE), y)
#AT+CMGS
BUILD_PS_SMS_CMGS_ENABLE = y
#AT+CMGC
BUILD_PS_SMS_CMGC_ENABLE = n
#AT+CMGR
BUILD_PS_SMS_CMGR_ENABLE = y
#AT+CMGW
BUILD_PS_SMS_CMGW_ENABLE = y
#AT+CSCA
BUILD_PS_SMS_CSCA_ENABLE = y
#AT+CNMI
BUILD_PS_SMS_CNMI_ENABLE = y
#AT+CMMS
BUILD_PS_SMS_CMMS_ENABLE = y
#AT+CMGD
BUILD_PS_SMS_CMGD_ENABLE = y
#AT+CMGL
BUILD_PS_SMS_CMGL_ENABLE = y
#AT+CSMS
BUILD_PS_SMS_CSMS_ENABLE = y
#AT+CPMS
BUILD_PS_SMS_CPMS_ENABLE = y
#AT+CNMA
BUILD_PS_SMS_CNMA_ENABLE = y
#AT+CMGF
BUILD_PS_SMS_CMGF_ENABLE = y
#AT+CSMP
BUILD_PS_SMS_CSMP_ENABLE = y
#AT+CSCB
BUILD_PS_SMS_CSCB_ENABLE = y
#AT+CSDH
BUILD_PS_SMS_CSDH_ENABLE = y
#AT+CMSS
BUILD_PS_SMS_CMSS_ENABLE = y
#AT+ECSMSSEND
BUILD_PS_SMS_ECSMSSEND_ENABLE = y
#AT+ECCMGS
BUILD_PS_SMS_ECCMGS_ENABLE = y
#AT+ECCMGR
BUILD_PS_SMS_ECCMGR_ENABLE = y
endif
##################################################################################################################
##name :BUILD_PHY_CONFIG_AT_ENABLE
##Description:
##BUILD_PHY_CONFIG_AT_ENABLE is to control whether include PHY CONFIG AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PHY_CONFIG_AT_ENABLE), y)
#AT+ECPHYCFG
BUILD_PHY_CONFIG_ECPHYCFG_ENABLE = y
#AT+ECEDRXSIMU
BUILD_PHY_CONFIG_ECEDRXSIMU_ENABLE = n
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_ECSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP EC SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_ECSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE
##Description:
##BUILD_PS_TCPIP_ECSOCK_AT_ENABLE is to control whether include TCPIP SKT SOCKET AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_SKTSOCK_AT_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_PS_TCPIP_API_ENABLE
##Description:
##BUILD_PS_TCPIP_API_ENABLE is to control whether include EC TCPIP API
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_PS_TCPIP_API_ENABLE), y)
# do nothing here
endif
##################################################################################################################
##name :BUILD_AT_REF
##Description:
##BUILD_AT_REF is to control whether include REF AT commands
##Use method: y is support;n is not support
##default value is y to support
##################################################################################################################
ifeq ($(BUILD_AT_REF), y)
#define QI sockets command AT+QIOPEN/QICLOSE/QIRD/QISDE/QIGETERROR/QISTATE/QISEND/QISENDEX/QISWTMD
BUILD_PS_REF_TCPIP_QSOCK_AT_ENABLE = y
#define QNETCONIG command AT+QIDNSCFG/QIDNSGIP/QNETDEVCTL
BUILD_PS_REF_TCPIP_QNETCONFIG_AT_ENABLE = n
#define QPING command AT+QPING
BUILD_PS_REF_TCPIP_QPING_SERVICE_ENABLE = n
#define QNTP command AT+QNTP
BUILD_PS_REF_TCPIP_QSNTP_SERVICE_ENABLE = n
#define QI socket command: AT+QCCID/QENG/QCELL/QWIFISCAN/QPOWD/QSPN/QIACT/QIDEACT/QIREGAPP/QICSGP/QGDCNT/QAUGDCNT
BUILD_PS_REF_EPS_AT_ENABLE = n
#define QI socket command: AT+QICFG/QCFG
BUILD_PS_REF_COMMON_AT_ENABLE = y
endif
#<<<'OPENCPU_MODE_ENABLE' ENDDING...
endif

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@ -1,27 +0,0 @@
ifeq ($(CONFIG_PROJ_APP_SECURITY_BOOT), y)
BUILDDIR ?= $(TOP)/PLAT/out/$(TARGET)/$(PROJECT)
EC_SECURE_TOOL := $(TOP)/PLAT/tools/ECSecTools/ECSecTools.exe
EC_SECURE_TOOL_CFG ?= $(TOP)/PLAT/tools/ECSecTools/config_secure.ini
BIN_HEAD_NAME := $(BINNAME)_head
#$(BUILDDIR)/$(BIN_HEAD_NAME).bin: $(BUILDDIR)/$(BINNAME).bin
# $(EC_SECURE_TOOL) genimghd bootloader
#.PHONY: POST_SIGN_STEP
.PHONY: build
POST_SIGN_HEAD_FILE := $(BUILDDIR)/$(BIN_HEAD_NAME).bin
$(POST_SIGN_HEAD_FILE):$(BUILDDIR)/$(BINNAME).elf
$(EC_SECURE_TOOL) --cfgfile $(EC_SECURE_TOOL_CFG) genimghd system
build:$(POST_SIGN_HEAD_FILE)
endif

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@ -1,266 +0,0 @@
AVAILABLE_TARGETS = ec7xx_ref_1h00
TOOLCHAIN = GCC
BINNAME = ap_$(PROJECT)
TOP := ../../../../../../..
CFLAGS += -DFEATURE_HAL_SCREEN_ENABLE
FLOAT_FLAG_ENABLE = y
SUBSYS_ENABLE = y
SUBSYS_SYSTIME_ENABLE = y
LIB_MM_JPEG_USED = y
SUBSYS_GRAPHIC_ENABLE = y
ifeq ($(SUBSYS_GRAPHIC_ENABLE),y)
SUBSYS_GRAPHIC_OPENIMAGE_ENABLE = y
SUBSYS_GRAPHIC_ARM2D_ENABLE = n
endif
SUBSYS_SYSLOG_ENABLE = y
SUBSYS_STORAGE_ENABLE = y
SUBSYS_FLASHEX_ENABLE = y
SUBSYS_LFSEX_ENABLE = y
SUBSYS_SDCARD_ENABLE = n
SUBSYS_FATFS_ENABLE = n
SUBSYS_STATUS_ENABLE = n
SUBSYS_APPHUB_ENABLE = y
SUBSYS_INPUT_ENABLE = y
SUBSYS_OPENHAL_ENABLE = y
SUBSYS_OPENSDK_ENABLE = n
SUBSYS_OPENDDK_ENABLE = n
SUBSYS_CONSOLE_ENABLE = y
ifeq ($(SUBSYS_CONSOLE_ENABLE),y)
SUBSYS_UARTSERVICE_ENABLE = y
SUBSYS_FINSH_ENABLE = y
endif
SUBSYS_CAMERA_ENABLE = y
ifeq ($(SUBSYS_CAMERA_ENABLE),y)
DRIVER_CAMERA_ENABLE = y
ifeq ($(DRIVER_CAMERA_ENABLE),y)
CFLAGS += -DFEATURE_DRIVER_CAMERA_ENABLE
endif
endif
DRIVER_LCD_ST7789_ENABLE = y
ifeq ($(DRIVER_LCD_ST7789_ENABLE),y)
DRIVER_LCD_ENABLE = y
CFLAGS += -DFEATURE_LCD_ST7789_ENABLE
CFLAGS += -DLCD_SPI_DATA_LANE=1
CFLAGS += -DLCD_HEIGHT=320
CFLAGS += -DLCD_WIDTH=240
CFLAGS += -DSPI_SPEED_MHz=51
endif
ifeq ($(DRIVER_LCD_ENABLE),y)
CFLAGS += -DLCD_BL_PWM_ENABLE
CFLAGS += -DFEATURE_DRIVER_LCD_ENABLE
endif
DRIVER_ADC_ENABLE = y
ifeq ($(DRIVER_ADC_ENABLE),y)
CFLAGS += -DFEATURE_DRIVER_ADC_ENABLE
endif
ifeq ($(EUTRAN_MODE), cat_mode)
EUTRAN_CAT_MODE = y
endif
#if need usb auto adapt support, set to y
#USBNET_AUTO_ADAPT_ENABLE=y
#enable below setting if OPENCPU_MODE is needed
ifeq ($(OPENCPU), true)
OPENCPU_MODE_ENABLE = y
endif
ifeq ($(GCF_ENABLE), true)
GCF_FEATURE_ENABLE = y
endif
ifeq ($(MID_ENABLE), true)
MID_FEATURE_ENABLE = y
endif
ifeq ($(IMS_ENABLE), true)
IMS_MODE_ENABLE = y
endif
ifeq ($(IMS_SMSONLY_ENABLE), true)
IMS_SMSONLY_MODE_ENABLE = y
endif
ifeq ($(AUDIO_ENABLE), true)
AUDIO_MODE_ENABLE = y
endif
ifeq ($(AUDIO_FIX_ENABLE), true)
AUDIO_FIX_SRC_ENABLE = y
endif
ifeq ($(TYPE), ec716s)
ifeq ($(RAM_ENBALE), true)
MORE_RAM_ENABLE = y
endif
endif
ifeq ($(TYPE), ec718p)
#AT+ECDIEXY
BUILD_PLAT_PROD_ECDIEXY_ENABLE = y
endif
ifeq ($(ROM_ENABLE), true)
MORE_ROM_ENABLE = y
endif
ifeq ($(LESS_LOG), true)
LESS_LOG_ENABLE = y
endif
ifeq ($(TYPE), ec718pm)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
ifeq ($(TYPE), ec718um)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
ifeq ($(TYPE), ec718sm)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
ifeq ($(TYPE), ec718hm)
EC718XM_LD_AND_PREC = y
EC718XM_VPU_ENHANCE = y
endif
#features will be customized to whatever customers want!
include $(TOP)/PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/GCC/FeatCustom_$(TYPE).inc
ifeq ($(EXCEPTION_FLASH_DUMP_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_EXCEPTION_FLASH_DUMP_ENABLE
endif
ifeq ($(MIDDLEWARE_AMR_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_AMR_CP_ENABLE
endif
ifeq ($(MIDDLEWARE_VEM_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_VEM_CP_ENABLE
endif
ifeq ($(IMS_ENABLE), true)
CFLAGS_DEFS += -DFEATURE_IMS_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_CC_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_SMS_ENABLE
ifneq ($(findstring $(TYPE), ec718p ec718u),)
CFLAGS_DEFS += -DFEATURE_IMS_USE_PSRAM_ENABLE
endif
CFLAGS_DEFS += -DFEATURE_IMS_EMC_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_UT_ENABLE
CFLAGS_DEFS += -fno-strict-aliasing
endif
ifeq ($(IMS_SMSONLY_ENABLE), true)
CFLAGS_DEFS += -DFEATURE_IMS_ENABLE
CFLAGS_DEFS += -DFEATURE_IMS_SMS_ENABLE
CFLAGS_DEFS += -fno-strict-aliasing
# NO FEATURE_IMS_CC_ENABLE
endif
ifeq ($(AUDIO_ENABLE), true)
ifeq ($(BUILD_SUPPORT_APP_PCM_MEM_POOL), y)
CFLAGS_DEFS += -DFEATURE_SUPPORT_APP_PCM_MEM_POOL
endif
CFLAGS_DEFS += -DFEATURE_AUDIO_ENABLE
endif
ifneq ($(findstring $(TYPE), ec716s ec716e),)
ifeq ($(RAM_ENBALE), true)
CFLAGS_DEFS += -DFEATURE_MORERAM_ENABLE
endif
endif
ifeq ($(ROM_ENABLE), true)
CFLAGS_DEFS += -DFEATURE_MOREROM_ENABLE
endif
ifeq ($(LESS_LOG), true)
CFLAGS_DEFS += -DFEATURE_LESSLOG_ENABLE
endif
ifeq ($(THIRDPARTY_CMCC_DM_ENABLE), y)
THIRDPARTY_CISONENET_ENABLE = y
THIRDPARTY_ERCOAP_ENABLE = y
endif
#ensure AT command to be consistent with protocol
#such as mqtt/...
ifeq ($(THIRDPARTY_MQTT_ENABLE), n)
BUILD_PLAT_MQTT_AT_ENABLE = n
endif
ifeq ($(THIRDPARTY_HTTPC_ENABLE), n)
BUILD_PLAT_HTTP_AT_ENABLE = n
endif
ifeq ($(THIRDPARTY_MBEDTLS_ENABLE), n)
BUILD_PLAT_SSL_AT_ENABLE = n
endif
ifeq ($(MIDDLEWARE_FOTAPAR_ENABLE), n)
BUILD_PLAT_FOTA_AT_ENABLE = n
BUILD_PLAT_ECOTA_AT_ENABLE = n
endif
CFLAGS_INC += -I ../inc \
-I $(TOP)/FIRMWARE/SRC/CAT1/Common/Inc \
-I $(TOP)/PLAT/driver/chip/$(CHIP)/ap/src/usb
obj-y += PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/main.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/main_app.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/input_proc.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/rawData.o \
PLAT/project/$(TARGET)/$(CORE)/apps/$(PROJECT)/src/bsp_custom.o
#CONFIG_PROJ_APP_SECURITY_BOOT = y
include $(TOP)/PLAT/tools/scripts/Makefile.rules
#configure USBNET_AUTO_ADAPT_ENABLE in ".\device\target\board\%BOARD_NAME%\ap\%BOARD_NAME%_ap.mk"'
ifeq ($(USBNET_AUTO_ADAPT_ENABLE), y)
CFLAGS_DEFS += -DFEATURE_USBNET_ATA_FOR_AP
CFLAGS_DEFS += -DFEATURE_FIX_REMOTE_WKUP_UNPAIRED_CASE
endif
#enable wdt
CFLAGS += -DWDT_FEATURE_ENABLE=1
CFLAGS += -DFEATURE_UART_HELP_DUMP_ENABLE
#Enable SIM hotswap feature with pad configration and jitter handle by required----don't remove it
#CFLAGS += -DSIM_HOT_SWAP_FEATURE
#Make all warnings into errors
# CFLAGS += -Werror
ifneq ($(OPENCPU_MODE_ENABLE),y)
ifneq ($(BUILD_AT),y)
$(error This example needs to modify "BUILD_AT" to "y" in device\target\board\$(TARGET)\$(CORE)\$(TARGET)_$(CORE).mk)
endif
endif

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@ -1,655 +0,0 @@
#ifndef __RTE_DEVICE_H
#define __RTE_DEVICE_H
#include "ec7xx.h"
/* Peripheral IO Mode Select, Must Configure First !!!
Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
*/
// Step2 choose one lcd
#define LCD_ST7789_ENABLE 1
// Step3 choose interface
#define LCD_INTERFACE_SPI 1
#define LCD_INTERFACE_MSPI 0
#define LCD_INTERFACE_8080 0
// Step4 choose spi data lane
#if (LCD_INTERFACE_SPI == 1)
#define BK_USE_PWM 1
//choose spi data lane
#define SPI_2_DATA_LANE 0
#define SPI_1_DATA_LANE 1
//choose one lcd
#define LCD_ST7789_ENABLE 1
#define LCD_AXS15231_ENABLE 0
#define TP_RST_GPIO_INSTANCE (1)
#define TP_RST_GPIO_PIN (2)
#define TP_RST_PAD_INDEX (13)
#define TP_RST_PAD_ALT_FUNC (PAD_MUX_ALT4)
#define TP_IRQ_GPIO_INSTANCE (2)
#define TP_IRQ_GPIO_PIN (4)
#define TP_IRQ_PAD_INDEX (42)
#define TP_IRQ_PAD_ALT_FUNC (PAD_MUX_ALT0)
#define LCD_RST_GPIO_INSTANCE (1)
#define LCD_RST_GPIO_PIN (3)
#define LCD_RST_PAD_INDEX (14)
#define LCD_RST_PAD_ALT_FUNC (PAD_MUX_ALT4)
#define LCD_BK_GPIO_INSTANCE (0)
#define LCD_BK_GPIO_PIN (1)
#define LCD_BK_PAD_INDEX (16)
#define LCD_BK_PAD_ALT_FUNC (PAD_MUX_ALT0)
#endif
#define TP_RST_GPIO_INSTANCE (1)
#define TP_RST_GPIO_PIN (2)
#define TP_RST_PAD_INDEX (13)
#define TP_RST_PAD_ALT_FUNC (PAD_MUX_ALT4)
#define TP_IRQ_GPIO_INSTANCE (2)
#define TP_IRQ_GPIO_PIN (4)
#define TP_IRQ_PAD_INDEX (42)
#define TP_IRQ_PAD_ALT_FUNC (PAD_MUX_ALT0)
#define LCD_RST_GPIO_INSTANCE (1)
#define LCD_RST_GPIO_PIN (3)
#define LCD_RST_PAD_INDEX (14)
#define LCD_RST_PAD_ALT_FUNC (PAD_MUX_ALT4)
#define LCD_BK_GPIO_INSTANCE (0)
#define LCD_BK_GPIO_PIN (1)
#define LCD_BK_PAD_INDEX (16)
#define LCD_BK_PAD_ALT_FUNC (PAD_MUX_ALT0)
#define LCD_PWM_INSTANCE (0)
#define LCD_PWM_OUT_PAD (LCD_BK_PAD_INDEX)
#define LCD_PWM_PAD_ALT_SEL (PAD_MUX_ALT5)
#define LCD_PWM_CLOCK_ID (FCLK_TIMER0)
#define LCD_PWM_INSTANCE_IRQ (PXIC0_TIMER0_IRQn)
#define LCD_PWM_CLOCK_SOURCE (FCLK_TIMER0_SEL_26M)
#define LSPI_RST_GPIO_INSTANCE LCD_RST_GPIO_INSTANCE
#define LSPI_RST_GPIO_PIN LCD_RST_GPIO_PIN
#define LSPI_RST_GPIO_ADDR LCD_RST_PAD_INDEX
#define LSPI_RST_PAD_ALT_FUNC LCD_RST_PAD_ALT_FUNC
#define POLLING_MODE 0x1
#define DMA_MODE 0x2
#define IRQ_MODE 0x3
#define UNILOG_MODE 0x4
#define RTE_UART0_TX_IO_MODE UNILOG_MODE
#ifdef TYPE_EC718M
#define RTE_UART0_RX_IO_MODE IRQ_MODE // Use IRQ_MODE instead of DMA_MODE coz we'll have no chance to enter psram Hybd sleep
#else
#define RTE_UART0_RX_IO_MODE DMA_MODE
#define USART0_RX_TRIG_LVL (30)
#endif
#define RTE_UART1_TX_IO_MODE DMA_MODE
#define RTE_UART1_RX_IO_MODE DMA_MODE
#define RTE_UART2_TX_IO_MODE DMA_MODE
#define RTE_UART2_RX_IO_MODE DMA_MODE
#define RTE_UART3_TX_IO_MODE DMA_MODE
#define RTE_UART3_RX_IO_MODE DMA_MODE
#define RTE_SPI0_IO_MODE POLLING_MODE
#define RTE_SPI1_IO_MODE POLLING_MODE
#define RTE_I2C0_IO_MODE POLLING_MODE
#define RTE_I2C1_IO_MODE POLLING_MODE
// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
#define RTE_I2C0 1
// { PAD_PIN30}, // 0 : gpio15 / 2: I2C0_SCL
// { PAD_PIN29}, // 0 : gpio14 / 2: I2C0_SDA
#define RTE_I2C0_SCL_BIT 30
#define RTE_I2C0_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C0_SDA_BIT 29
#define RTE_I2C0_SDA_FUNC PAD_MUX_ALT2
// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
#define RTE_I2C1 1
// { PAD_PIN20}, // 0 : gpio5 / 2 : I2C1 SCL
// { PAD_PIN19}, // 0 : gpio4 / 2 : I2C1 SDA
#define RTE_I2C1_SCL_BIT 20
#define RTE_I2C1_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C1_SDA_BIT 19
#define RTE_I2C1_SDA_FUNC PAD_MUX_ALT2
// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
// Configuration settings for Driver_USART0 in component ::Drivers:USART
#define RTE_UART0 1
#define RTE_UART0_CTS_PIN_EN 0
#define RTE_UART0_RTS_PIN_EN 0
#if defined CHIP_EC718
// { PAD_PIN42}, // 0 : gpio36 / 3 : UART0 RTSn
// { PAD_PIN43}, // 0 : gpio37 / 3 : UART0 CTSn
// { PAD_PIN31}, // 0 : gpio16 / 1 : UART0 RXD
// { PAD_PIN32}, // 0 : gpio17 / 1 : UART0 TXD
#define RTE_UART0_RTS_BIT 42
#define RTE_UART0_RTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_CTS_BIT 43
#define RTE_UART0_CTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_RX_BIT 31
#define RTE_UART0_RX_FUNC PAD_MUX_ALT1
#define RTE_UART0_TX_BIT 32
#define RTE_UART0_TX_FUNC PAD_MUX_ALT1
#elif defined CHIP_EC716
// { PAD_PIN14}, // 0 : gpio2 / 5 : UART0 RTSn
// { PAD_PIN15}, // 0 : gpio3 / 5 : UART0 CTSn
// { PAD_PIN18}, // 0 : gpio6 / 1 : UART0 RXD
// { PAD_PIN19}, // 0 : gpio7 / 1 : UART0 TXD
#define RTE_UART0_RTS_BIT 14
#define RTE_UART0_RTS_FUNC PAD_MUX_ALT5
#define RTE_UART0_CTS_BIT 15
#define RTE_UART0_CTS_FUNC PAD_MUX_ALT5
#define RTE_UART0_RX_BIT 18
#define RTE_UART0_RX_FUNC PAD_MUX_ALT1
#define RTE_UART0_TX_BIT 19
#define RTE_UART0_TX_FUNC PAD_MUX_ALT1
#endif
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_TX_REQID DMA_REQUEST_USART0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_RX_REQID DMA_REQUEST_USART0_RX
// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
// Configuration settings for Driver_USART1 in component ::Drivers:USART
#define RTE_UART1 1
#define RTE_UART1_CTS_PIN_EN 0
#define RTE_UART1_RTS_PIN_EN 0
#if defined CHIP_EC718
// { PAD_PIN27}, // 0 : gpio12 / 2 : UART1 RTS
// { PAD_PIN28}, // 0 : gpio13 / 2 : UART1 CTS
// { PAD_PIN33}, // 0 : gpio18 / 1 : UART1 RXD
// { PAD_PIN34}, // 0 : gpio19 / 1 : UART1 TXD
#define RTE_UART1_RTS_BIT 27
#define RTE_UART1_RTS_FUNC PAD_MUX_ALT2
#define RTE_UART1_CTS_BIT 28
#define RTE_UART1_CTS_FUNC PAD_MUX_ALT2
#define RTE_UART1_RX_BIT 33
#define RTE_UART1_RX_FUNC PAD_MUX_ALT1
#define RTE_UART1_TX_BIT 34
#define RTE_UART1_TX_FUNC PAD_MUX_ALT1
#elif defined CHIP_EC716
// { PAD_PIN16}, // 0 : gpio4 / 5 : UART1 RTS
// { PAD_PIN17}, // 0 : gpio5 / 5 : UART1 CTS
// { PAD_PIN20}, // 0 : gpio8 / 1 : UART1 RXD
// { PAD_PIN21}, // 0 : gpio9 / 1 : UART1 TXD
#define RTE_UART1_RTS_BIT 16
#define RTE_UART1_RTS_FUNC PAD_MUX_ALT5
#define RTE_UART1_CTS_BIT 17
#define RTE_UART1_CTS_FUNC PAD_MUX_ALT5
#define RTE_UART1_RX_BIT 20
#define RTE_UART1_RX_FUNC PAD_MUX_ALT1
#define RTE_UART1_TX_BIT 21
#define RTE_UART1_TX_FUNC PAD_MUX_ALT1
#endif
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_TX_REQID DMA_REQUEST_USART1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_RX_REQID DMA_REQUEST_USART1_RX
// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
// Configuration settings for Driver_USART2 in component ::Drivers:USART
#define RTE_UART2 1
// { PAD_PIN25}, // 0 : gpio10 / 3 : UART2 RXD
// { PAD_PIN26}, // 0 : gpio11 / 3 : UART2 TXD
#define RTE_UART2_RX_BIT 27
#define RTE_UART2_RX_FUNC PAD_MUX_ALT3
#define RTE_UART2_TX_BIT 28
#define RTE_UART2_TX_FUNC PAD_MUX_ALT3
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_TX_REQID DMA_REQUEST_USART2_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_RX_REQID DMA_REQUEST_USART2_RX
#define RTE_UART3 1
// { PAD_PIN29}, // 0 : gpio14 / 3 : UART3 RXD
// { PAD_PIN30}, // 0 : gpio15 / 3 : UART3 TXD
#define RTE_UART3_RX_BIT 29
#define RTE_UART3_RX_FUNC PAD_MUX_ALT3
#define RTE_UART3_TX_BIT 30
#define RTE_UART3_TX_FUNC PAD_MUX_ALT3
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART3_DMA_TX_REQID DMA_REQUEST_USART3_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART3_DMA_RX_REQID DMA_REQUEST_USART3_RX
// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
#define RTE_SPI0 1
// { PAD_PIN23}, // 0 : gpio8 / 1 : SPI0 SSn
// { PAD_PIN24}, // 0 : gpio9 / 1 : SPI0 MOSI
// { PAD_PIN25}, // 0 : gpio10 / 1 : SPI0 MISO
// { PAD_PIN26}, // 0 : gpio11 / 1 : SPI0 SCLK
#define RTE_SPI0_SSN_BIT 23
#define RTE_SPI0_SSN_FUNC PAD_MUX_ALT1
#define RTE_SPI0_MOSI_BIT 24
#define RTE_SPI0_MOSI_FUNC PAD_MUX_ALT1
#define RTE_SPI0_MISO_BIT 25
#define RTE_SPI0_MISO_FUNC PAD_MUX_ALT1
#define RTE_SPI0_SCLK_BIT 26
#define RTE_SPI0_SCLK_FUNC PAD_MUX_ALT1
#define RTE_SPI0_SSN_GPIO_INSTANCE 0
#define RTE_SPI0_SSN_GPIO_INDEX 8
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_TX_REQID DMA_REQUEST_SPI0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_RX_REQID DMA_REQUEST_SPI0_RX
// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
#define RTE_SPI1 0
// { PAD_PIN27}, // 0 : gpio12 / 1 : SPI1 SSn
// { PAD_PIN28}, // 0 : gpio13 / 1 : SPI1 MOSI
// { PAD_PIN29}, // 0 : gpio14 / 1 : SPI1 MISO
// { PAD_PIN30}, // 0 : gpio15 / 1 : SPI1 SCLK
// { PAD_PIN26}, // 0 : gpio11 / 2 : SPI1 SSn1
#define RTE_SPI1_SSN_BIT 27
#define RTE_SPI1_SSN_FUNC PAD_MUX_ALT1
#define RTE_SPI1_MOSI_BIT 28
#define RTE_SPI1_MOSI_FUNC PAD_MUX_ALT1
#define RTE_SPI1_MISO_BIT 29
#define RTE_SPI1_MISO_FUNC PAD_MUX_ALT1
#define RTE_SPI1_SCLK_BIT 30
#define RTE_SPI1_SCLK_FUNC PAD_MUX_ALT1
#define RTE_SPI1_SSN_GPIO_INSTANCE 0
#define RTE_SPI1_SSN_GPIO_INDEX 12
#define RTE_SPI1_SSN1_BIT 26
#define RTE_SPI1_SSN1_FUNC PAD_MUX_ALT2
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_TX_REQID DMA_REQUEST_SPI1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_RX_REQID DMA_REQUEST_SPI1_RX
// PWM0 Controller [Driver_PWM0]
// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
#define RTE_PWM 1
#define EFUSE_INIT_MODE POLLING_MODE
#define L2CTLS_INIT_MODE POLLING_MODE
#define FLASH_BARE_RW_MODE 1
// LSPI2 Configuration
#define RTE_LSPI2 1
#if (LCD_INTERFACE_SPI == 1)
#define RTE_USP2_DS_PAD_ADDR 44 // DS: gpio38
#define RTE_USP2_DS_FUNC PAD_MUX_ALT2
#define RTE_USP2_CLK_PAD_ADDR 40 // clock: gpio34
#define RTE_USP2_CLK_FUNC PAD_MUX_ALT1
#define RTE_USP2_CS_PAD_ADDR 41 // cs: gpio35
#define RTE_USP2_CS_FUNC PAD_MUX_ALT1
#define RTE_USP2_DIN_PAD_ADDR 42 // miso: gpio36
#define RTE_USP2_DIN_FUNC PAD_MUX_ALT1
#define RTE_USP2_DOUT0_PAD_ADDR 43 // mosi: gpio37
#define RTE_USP2_DOUT0_FUNC PAD_MUX_ALT1
#if (SPI_2_DATA_LANE == 1)
#define RTE_USP2_DOUT1_PAD_ADDR 44 // DS: gpio38
#define RTE_USP2_DOUT1_FUNC PAD_MUX_ALT2
#endif
#endif
#define RTE_LSPI2_IO_MODE POLLING_MODE
// DMA LSPI2 Request ID
#define RTE_LSPI2_DMA_RX_REQID DMA_REQUEST_USP2_TX
/////////////////////////// Camera Configuration Start////////////////////////////////////////////////////
// CSPI1 Configuration
#define RTE_CSPI1 1
#define RTE_CSPI1_MCLK_PAD_ADDR 18
#define RTE_CSPI1_MCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_PCLK_PAD_ADDR 19
#define RTE_CSPI1_PCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_CS_PAD_ADDR 20
#define RTE_CSPI1_CS_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_SDO0_PAD_ADDR 21
#define RTE_CSPI1_SDO0_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_SDO1_PAD_ADDR 22
#define RTE_CSPI1_SDO1_FUNC PAD_MUX_ALT1
// DMA CSPI1 Request ID
#define RTE_CSPI1_DMA_RX_REQID DMA_REQUEST_USP1_RX
// Choose camera version
#define CAMERA_ENABLE_SP0A39 0 ///< SP0A39 enable
#define SP0A39_2SDR 0 ///< SP0A39 2 wire
#define SP0A39_1SDR 0 ///< SP0A39 1 wire
#if (CAMERA_ENABLE_SP0A39 == 1)
#define CAM_CHAIN_COUNT CAM_30W
#endif
#define CAMERA_ENABLE_SP0821 0 ///< SP0821 enable
#define SP0821_2SDR 0 ///< SP0821 2 wire
#define SP0821_1SDR 0 ///< SP0821 1 wire
#if (CAMERA_ENABLE_SP0821 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
#define CAMERA_ENABLE_GC6123 0 ///< GC6123 enable
#define GC6123_2SDR 1 ///< GC6123 2 wire
#define GC6123_1SDR 0 ///< GC6123 1 wire
#if (CAMERA_ENABLE_GC6123 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
#define CAMERA_ENABLE_GC032A 1 ///< GC032A enable
#define GC032A_2SDR 0 ///< GC6123 2 wire
#define GC032A_1SDR 0 ///< GC6123 1 wire
#define GC032A_2DDR 1 ///< GC6123 1 wire
#if (CAMERA_ENABLE_GC032A == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR // use 8w to save decode's memory
#endif
#define CAMERA_ENABLE_BF30A2 0 ///< BF30A2 enable
#define BF30A2_1SDR 1 ///< BF30A2 1 wire
#if (CAMERA_ENABLE_BF30A2 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
#define CAMERA_ENABLE_GC6153 0 ///< GC6123 enable
#define GC6153_1SDR 1 ///< GC6123 1 wire
#if (CAMERA_ENABLE_GC6153 == 1)
#define CAM_CHAIN_COUNT CAM_8W_COLOR
#endif
#if ((CAMERA_ENABLE_GC032A == 1))
#define PIC_SRC_HEIGHT 480
#define PIC_SRC_WIDTH 640
#else
#define PIC_SRC_HEIGHT 240
#define PIC_SRC_WIDTH 320
#endif
/*
static configuration for USB/UART relatded feature
RTE_USB_EN: whether init USB stack
RTE_ONE_UART_AT: enable one UART AT
RTE_ONE_UART_AT: enable two UART AT
RTE_ETHER_EN : whehter RNDIS/ECM feature is enabled
RTE_PPP_EN : whehter PPPOS feature is enabled
RTE_OPAQ_EN : whehter OPAQOS feature is enabled
*/
#if (defined OPEN_CPU_MODE)
/* device */
#define RTE_USB_EN 1
#define RTE_ONE_UART_AT 1
#define RTE_TWO_UART_AT 0
/* feature */
#define RTE_ETHER_EN 0
#define RTE_OPAQ_EN 0
#else
/* device */
#define RTE_USB_EN 1
#define RTE_ONE_UART_AT 1
#define RTE_TWO_UART_AT 0
/* feature */
#if (RTE_USB_EN == 1)
#define RTE_ETHER_EN 1 /* 0/1: to ctrl eth(rndis/ecm) independently! */
#ifdef FEATURE_USB_CCID_ENABLE
#define RTE_CCID_EN 1 /* 0/1: to ctrl ccid independently! */
#else
#define RTE_CCID_EN 0 /* 0/1: to ctrl ccid independently! */
#endif
#else
#define RTE_ETHER_EN RTE_USB_EN /* must be the same(disabled) */
#define RTE_CCID_EN RTE_USB_EN /* 0/1: to ctrl ccid independently! */
#endif
#define RTE_OPAQ_EN 0
#endif
#ifdef FEATURE_PPP_ENABLE
#define RTE_PPP_EN 1
#else
#define RTE_PPP_EN 0
#endif
/* to be compatible with old style */
#define RTE_RNDIS_EN RTE_ETHER_EN
#if (defined FEATURE_AUDIO_ENABLE)
#define RTE_AUDIO_EN 1
#define AUDIO_BOARD_NMA_SUPPORT 1
#else
#define RTE_AUDIO_EN 0
#endif
#if (RTE_ONE_UART_AT == 1)
#define RTE_UART0 1
#define RTE_UART1 1
#define RTE_UART2 1 //used by Sensor or BLE
#elif (RTE_TWO_UART_AT == 1)
#define RTE_UART0 1
#define RTE_UART1 1
#define RTE_UART2 1
#endif
/* to enable external thermal */
#define EXTERNAL_NTC_EXIST 0
#define RTE_LPUART_EN 1
#if (RTE_UART1 == 1)
#define UART1_DTR_PAD_INDEX 26 // GPIO11
#define UART1_DTR_GPIO_INSTANCE 0
#define UART1_DTR_GPIO_PIN 11
#define UART1_RI_PAD_INDEX 44 // AONIO 4 = GPIO24
#define UART1_RI_GPIO_INSTANCE 1
#define UART1_RI_GPIO_PIN 8
#define UART1_RI_PWM_INSTANCE 1
#define UART1_RI_PWM_CLK_ID FCLK_TIMER1
#define UART1_RI_PWM_CLK_SEL FCLK_TIMER1_SEL_26M
#define UART1_DCD_PAD_INDEX 45 // AONIO 5 = GPIO25
#define UART1_DCD_GPIO_INSTANCE 1
#define UART1_DCD_GPIO_PIN 9
#endif
#if (RTE_UART2 == 1)
#define UART2_DTR_PAD_INDEX 25 // GPIO10
#define UART2_DTR_GPIO_INSTANCE 0
#define UART2_DTR_GPIO_PIN 10
#define UART2_RI_PAD_INDEX 43 // AONIO 3 = GPIO23
#define UART2_RI_GPIO_INSTANCE 1
#define UART2_RI_GPIO_PIN 7
#define UART2_RI_PWM_INSTANCE 0
#define UART2_RI_PWM_CLK_ID FCLK_TIMER0
#define UART2_RI_PWM_CLK_SEL FCLK_TIMER0_SEL_26M
#define UART2_DCD_PAD_INDEX 47 // AONIO 7 = GPIO27
#define UART2_DCD_GPIO_INSTANCE 1
#define UART2_DCD_GPIO_PIN 11
#endif
#define NETLIGHT_PAD_INDEX 51 // AONIO 6 = GPIO26
#define NETLIGHT_PAD_ALT_FUNC PAD_MUX_ALT5
#define NETLIGHT_PWM_INSTANCE 3
//USIM1 OPTION1
#if defined CHIP_EC718
#define USIM1_URST_OP1_PAD_INDEX 19 // GPIO4
#define USIM1_URST_OP1_GPIO_INSTANCE 0
#define USIM1_URST_OP1_GPIO_PIN 4
#define USIM1_UCLK_OP1_PAD_INDEX 20 // GPIO5
#define USIM1_UCLK_OP1_GPIO_INSTANCE 0
#define USIM1_UCLK_OP1_GPIO_PIN 5
#define USIM1_UIO_OP1_PAD_INDEX 21 // GPIO6
#define USIM1_UIO_OP1_GPIO_INSTANCE 0
#define USIM1_UIO_OP1_GPIO_PIN 6
#elif defined CHIP_EC716
#define USIM1_URST_OP1_PAD_INDEX 13 // GPIO1
#define USIM1_URST_OP1_GPIO_INSTANCE 0
#define USIM1_URST_OP1_GPIO_PIN 1
#define USIM1_UCLK_OP1_PAD_INDEX 14 // GPIO2
#define USIM1_UCLK_OP1_GPIO_INSTANCE 0
#define USIM1_UCLK_OP1_GPIO_PIN 2
#define USIM1_UIO_OP1_PAD_INDEX 15 // GPIO3
#define USIM1_UIO_OP1_GPIO_INSTANCE 0
#define USIM1_UIO_OP1_GPIO_PIN 3
#endif
//USIM1 OPTION2
#define USIM1_UIO_OP2_PAD_INDEX 27 // GPIO12
#define USIM1_UIO_OP2_GPIO_INSTANCE 0
#define USIM1_UIO_OP2_GPIO_PIN 12
#define USIM1_URST_OP2_PAD_INDEX 28 // GPIO13
#define USIM1_URST_OP2_GPIO_INSTANCE 0
#define USIM1_URST_OP2_GPIO_PIN 13
#define USIM1_UCLK_OP2_PAD_INDEX 29 // GPIO14
#define USIM1_UCLK_OP2_GPIO_INSTANCE 0
#define USIM1_UCLK_OP2_GPIO_PIN 14
//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
#if defined CHIP_EC718
#define AONIO_6_PAD_INDEX 46 // AONIO 6 = GPIO26
#define AONIO_6_GPIO_INSTANCE 1
#define AONIO_6_GPIO_PIN 10
#elif defined CHIP_EC716
#define AONIO_6_PAD_INDEX 28 // AONIO 6 = GPIO16
#define AONIO_6_GPIO_INSTANCE 1
#define AONIO_6_GPIO_PIN 0 //GPIO16, (16 % 16)
#endif
#ifdef SIM_HOT_SWAP_FEATURE
#define TIMER_INSTANCE_4 4
#endif
//////////////////////////////////////////////////////////////////////////////////////////////
// I2S Setting field Start
// All the I2S's parameters that need user to set are all put here
//////////////////////////////////////////////////////////////////////////////////////////////
// I2S0 Configuration
#define RTE_I2S0 1
#define RTE_I2S0_MCLK_PAD_ADDR 39
#define RTE_I2S0_MCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S0_BCLK_PAD_ADDR 35
#define RTE_I2S0_BCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S0_LRCK_PAD_ADDR 36
#define RTE_I2S0_LRCK_FUNC PAD_MUX_ALT1
#define RTE_I2S0_DIN_PAD_ADDR 37
#define RTE_I2S0_DIN_FUNC PAD_MUX_ALT1
#define RTE_I2S0_DOUT_PAD_ADDR 38
#define RTE_I2S0_DOUT_FUNC PAD_MUX_ALT1
// I2S1 Configuration
#define RTE_I2S1 0
#define RTE_I2S1_IO_MODE DMA_MODE
#define RTE_I2S1_MCLK_PAD_ADDR 18
#define RTE_I2S1_MCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S1_BCLK_PAD_ADDR 19
#define RTE_I2S1_BCLK_FUNC PAD_MUX_ALT1
#define RTE_I2S1_LRCK_PAD_ADDR 20
#define RTE_I2S1_LRCK_FUNC PAD_MUX_ALT1
#define RTE_I2S1_DIN_PAD_ADDR 21
#define RTE_I2S1_DIN_FUNC PAD_MUX_ALT1
#define RTE_I2S1_DOUT_PAD_ADDR 22
#define RTE_I2S1_DOUT_FUNC PAD_MUX_ALT1
//////////////////////////////////////////////////////////////////////////////////////////////
// I2S Setting field End
//////////////////////////////////////////////////////////////////////////////////////////////
#endif /* __RTE_DEVICE_H */

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#ifndef BSP_CUSTOM_H
#define BSP_CUSTOM_H
#ifdef __cplusplus
extern "C" {
#endif
#include "bsp.h"
/*
the following types define the scenarios of LdoFemVbat,
Scenario type1: LdoFemVbat does NOT reuse to RF FrontEnd (PA and switches) at all;
Scenario type2: LdoFemVbat is used for RF FrontEnd (PA or switches) at all, while also multiplexing other peripherals (such as cameras, vovice codecs, etc);
Scenario type3: LdoFemVbat is only used for RF FrontEnd (PA or switches) and is NOT reused for other peripherals (such as cameras, vovice codecs, etc);
The default setting is Scenario type3.
*/
enum
{
/*For this type1, the application needs to open or close LdoFemVbat on its own.
Please Note that LdoFemVbat will be turned off after entering sleep mode,
after exiting sleep, the application also needs to open LdoFemVbat and re-initialize the relevant peripherals under this power supply.
*/
LDOFEMVBAT_SCENARIO_TYPE1 = 0x0,
/*For this type2, the application needs to re-open LdoFemVbat before each use of peripherals under this power supply,
after use, LdoFemVbat can NOT be turned off (nor can it be turned off) because LdoFemVbat is also used for RF devices (PA or switches).
Meanwhile, due to the sleep mode, the logic implemented by the software will close LdoFemVbat before entering into sleep, and then open after exiting from sleep.
So, the application needs to re-open LdoFemVbat before use.
During the period when the application is using the peripheral, if need to keep LdoFemVbat in a powered state,
it can NOT enter any sleep mode.
*/
LDOFEMVBAT_SCENARIO_TYPE2,
/*For this type3, default mode, application does NOT use LdoFemVbat.*/
LDOFEMVBAT_SCENARIO_TYPE3
};
void BSP_CustomInit(void);
uint32_t BSP_UsbGetVBUSMode(void);
uint32_t BSP_UsbGetVBUSWkupPad(void);
void SimHotSwapInit(void);
#ifdef __cplusplus
}
#endif
#endif /* BSP_CUSTOM_H */

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/****************************************************************************
*
* Copy right: 2023-, Copyrigths of EigenComm Ltd.
* File name: mode.h
* Description: ec7xx mode config entry header file
* History: Rev1.0 2023-11-22
*
****************************************************************************/
#ifndef MODE_CONFIG_H
#define MODE_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
#include "FreeRTOS.h"
#include "ostask.h"
typedef enum Thread_Mode_bits {
THREAD_FLAG_INIT = (1UL << 0),
THREAD_FLAG_NORM = (1UL << 1),
THREAD_FLAG_IDLE = (1UL << 2), //非工作状态
THREAD_FLAG_SLEP = (1UL << 3), //osThreadSuspend
THREAD_FLAG_STOP = (1UL << 4),
THREAD_FLAG_TEST = (1UL << 5),
THREAD_FLAG_MAX = (1UL << 6),
THREAD_FLAG_ALL = (THREAD_FLAG_MAX-1)
} ThreadModeBits;
typedef enum
{
PWR_NONE,
PWR_IDLE,
PWR_SLEEP,
}psStat_t;
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#define SUBSYS_APPHUB_TASK_STACK_SIZE (1024*5)
extern StaticTask_t subsys_apphub_task;
extern uint8_t subsys_apphub_task_stack[SUBSYS_APPHUB_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
#define SUBSYS_INPUT_TASK_STACK_SIZE (1024*1)
extern StaticTask_t subsys_input_task;
extern uint8_t subsysInputTaskStack[SUBSYS_INPUT_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#define SUBSYS_STATUS_TASK_STACK_SIZE (1024*5)
extern StaticTask_t subsysStatusTask;
extern uint8_t subsys_status_task_stack[SUBSYS_STATUS_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STORAGE_ENABLE
#define SUBSYS_STORAGE_TASK_STACK_SIZE (1024*6)
extern StaticTask_t subsys_storage_task;
extern uint8_t subsys_storage_task_stack[SUBSYS_STORAGE_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_CAMERA_ENABLE
#define SUBSYS_CAMERA_TASK_STACK_SIZE (1024)
extern StaticTask_t subsys_camera_task;
extern uint8_t subsys_camera_task_stack[SUBSYS_CAMERA_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_MEDIA_ENABLE
// #define SUBSYS_MEDIA_TASK_STACK_SIZE (1024*1)
// extern StaticTask_t subsys_media_task;
// extern uint8_t subsys_media_task_stack[SUBSYS_MEDIA_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_LAUNCHER_ENABLE
#define SUBSYS_GUI_TASK_STACK_SIZE (1024*4)
extern StaticTask_t subsys_gui_task;
extern uint8_t subsys_gui_task_stack[SUBSYS_GUI_TASK_STACK_SIZE];
#ifdef FEATURE_DRIVER_LCD_ENABLE
#include "lcdDrv.h"
#include "lcdComm.h"
extern lcdDrvFunc_t* lcdDev;
#endif
extern void guiInit(uint32_t mode);
extern void guiModeSet(ThreadModeBits mode);
#endif
#define SMS_BUFF_NUM (3U)
#define SMS_SIZE_MAX (2*164U)
typedef struct
{
int8_t index;
uint8_t length;
char user[25];
char date[25];
char number[25];
uint8_t text[SMS_SIZE_MAX];
} sms_data_t;
#ifdef __cplusplus
}
#endif
#endif /* MODE_CONFIG_H */

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#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#include "app.h"
#include "apphub.h"
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#include "status.h"
#endif
#ifdef FEATURE_SUBSYS_MODE_ENABLE
#include "mode.h"
#endif
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
#include "uartservice.h"
#endif
#ifdef FEATURE_SUBSYS_CMDPARSE_ENABLE
#include "cmdparse.h"
#endif
#ifdef FEATURE_SUBSYS_AUDIO_ENABLE
#include "audio.h"
#endif
#ifdef FEATURE_SUBSYS_SENSORHUB_ENABLE
#include "sensorhub.h"
#endif
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
#include "keypad.h"
#include "kpc.h"
extern const uint8_t keyCodes[ROWS][COLUMNS];
#endif
#include "cmsis_os2.h"
#include "slpman.h"
#include "pwrkey.h"
#include "ostask.h"
#include "osasys.h"
#include "bsp.h"
#include "bsp_custom.h"
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
#include "input.h"
#endif
#ifdef FEATURE_SUBSYS_SYSLOG_ENABLE
#include "syslog.h"
#endif
#define APP_TRACE(subId, argLen, format, ...) \
ECOMM_TRACE(UNILOG_REF_APP, subId, P_VALUE, argLen, format, ##__VA_ARGS__)
#define QUEUE_SIZE_KEY 50
#define KEY_PRESSED 0
#define KEY_PRESS_SHORT_TIME 10
#define KEY_PRESS_LONG_TIME 2000
#include "mode_config.h"
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
#include "kpc_defs.h"
#endif
static uint8_t number_input_flag = 0;
static uint8_t test_flag = 0;
typedef enum
{
KEY_PRESS_SHORT = 0,
KEY_PRESS_LONG = 1
} KeyPressT;
typedef enum
{
KEY_ACTION_VOLUME_PLUS_SHORT = 0,
KEY_ACTION_VOLUME_PLUS_LONG = 1,
KEY_ACTION_VOLUME_MINUS_SHORT = 2,
KEY_ACTION_VOLUME_MINUS_LONG = 3,
KEY_ACTION_MENU_SHORT = 4,
KEY_ACTION_MENU_LONG = 5,
KEY_ACTION_INVALID
} KeyActionT;
typedef struct
{
uint8_t pad;
uint32_t timeBegin;
uint32_t timeEnd;
} KeyActionDataT;
static osMessageQueueId_t gKeyQueue = NULL;
static KeyActionDataT gKeyActionData[WAKEUP_PAD_MAX] = {0};
void extInputProc()
{
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
keypadScan();
#endif
}
void cmdInputProc()
{
#ifdef FEATURE_SUBSYS_CMDPARSE_ENABLE
CmdParseResultT cmdParseResult = {0};
AppMsgT msg={0};
if (cmdParseResultGet(&cmdParseResult, 0) == osOK)
{
SYSLOG_INFO("name: %s, param1: %d, param2: %d, param3: %s\r\n",
cmdParseResult.name, cmdParseResult.param1, cmdParseResult.param2,
(cmdParseResult.param3 != NULL) ? cmdParseResult.param3 : "NULL");
if(strcmp(cmdParseResult.name,"@key") == 0)
{
if (cmdParseResult.param3 != NULL)
{
msg.msgType = APP_KEY_MSG;
msg.param1 = cmdParseResult.param3[0];
appSendMsg(&msg);
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
uartServiceSend(cmdParseResult.param3,10);
#endif
}
}
else if(strcmp(cmdParseResult.name,"@tp") ==0)
{
;
}
else if(strcmp(cmdParseResult.name,"@message") ==0)
{
;
}
else if (strcmp(cmdParseResult.name,"@mode") == 0)
{
#ifdef FEATURE_SUBSYS_MODE_ENABLE
modeSave(cmdParseResult.param1);
#endif
}else if(strcmp(cmdParseResult.name,"@dbgswi") == 0)
{
#ifdef FEATURE_SUBSYS_MODE_ENABLE
if(debugTypeGet() >= 3)
{
#ifdef FEATURE_SUBSYS_CONSOLE_ENABLE
SYSLOG_INFO("swi consoleTaskInit\r\n");
consoleTaskInit();
debugSet(DEBUG_CMD);
#endif
}
#endif
}
else
{
msg.msgType=APP_USER_MSG;
appSendMsg(&msg);
}
if (cmdParseResult.param3 != NULL)
{
free(cmdParseResult.param3);
cmdParseResult.param3 = NULL;
}
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
uartServiceSend("Success", 0);
#endif
}
#endif
}
void statsInputProc()
{
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
StatusT status = {0};
AppMsgT msg={0};
if (statusGet(&status, 0) == osOK)
{
msg.msgType = APP_STAT_MSG;
msg.param1 = ((int32_t *)(&status))[0];
msg.param2 = ((int32_t *)(&status))[1];
msg.param3 = (uint32_t *)(status.time);
appSendMsg(&msg);
}
#endif
}
void powerKeyHandle(pwrKeyPressStatus status)
{
}
void inputProcMount()
{
mountInputProc(extInputProc, 0);
mountInputProc(cmdInputProc, 1);
mountInputProc(statsInputProc, 2);
}

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@ -1,230 +0,0 @@
/****************************************************************************
*
* Copy right: 2023-, Copyrigths of EigenComm Ltd.
* File name: main.c
* Description: EC718P ref_app min entry source file
* History: Rev1.0 2023-11-16
*
****************************************************************************/
#include <string.h>
#include "bsp.h"
#include "bsp_custom.h"
#include "os_common.h"
#include "ostask.h"
#include DEBUG_LOG_HEADER_FILE
#include "plat_config.h"
#include "slpman.h"
#include "mode_config.h"
#include "version.h"
#ifdef FEATURE_AT_ENABLE
#include "at_def.h"
#include "at_api.h"
#endif
#if defined(FEATURE_CTCC_DM_ENABLE) || defined(FEATURE_CUCC_DM_ENABLE) || defined(FEATURE_CMCC_DM_ENABLE)
#include "dm_task.h"
#endif
#ifdef FEATURE_APP_TLS_ENABLE
#include "at_ssl_task.h"
#endif
#ifdef FEATURE_PLAT_HTTP_AT_ENABLE
#include "at_http_task.h"
#endif
#ifdef FEATURE_CTWING_CERTI_ENABLE
#include "ctw_task.h"
#endif
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
#include "input.h"
StaticTask_t subsys_input_task;
uint8_t subsysInputTaskStack[SUBSYS_INPUT_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STORAGE_ENABLE
#include "storage.h"
StaticTask_t subsys_storage_task;
uint8_t subsys_storage_task_stack[SUBSYS_STORAGE_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#include "status.h"
StaticTask_t subsysStatusTask;
uint8_t subsys_status_task_stack[SUBSYS_STATUS_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
#include "uartservice.h"
#endif
#ifdef FEATURE_SUBSYS_CMDPARSE_ENABLE
#include "cmdparse.h"
#endif
#ifdef FEATURE_SUBSYS_MISC_ENABLE
#include "misc.h"
#endif
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#include "app.h"
#include "apphub.h"
StaticTask_t subsys_apphub_task;
PLAT_FPSRAM_ZI_CUST __ALIGNED(8) uint8_t subsys_apphub_task_stack[SUBSYS_APPHUB_TASK_STACK_SIZE];
#endif
#ifdef FEATURE_SUBSYS_SYSLOG_ENABLE
#include "syslog.h"
#endif
#ifdef FEATURE_SUBSYS_CAMERA_ENABLE
#include "camera.h"
StaticTask_t subsys_camera_task;
PLAT_FPSRAM_ZI_CUST __ALIGNED(8) uint8_t subsys_camera_task_stack[SUBSYS_CAMERA_TASK_STACK_SIZE];
#endif
#include "cameraDrv.h"
#include "lcdDrv.h"
#include "lspi.h"
#include "slpman.h"
void usb_portmon_task_init(void);
#ifdef FEATURE_SUBSYS_OPENHAL_ENABLE
#include "api_tp.h"
#include "api_scr.h"
#include "api_comm.h"
// #include "lv_port_indev.h"
// #define EPAT_LOG(subId, debugLevel, format, ...) \
// ECPLAT_PRINTF(UNILOG_OPEN_HAL, subId, debugLevel, format, ##__VA_ARGS__)
static int16_t xy_pos[4]={0};
static api_tp_infp tp_interface;
static uint32_t tpInputCount = 0;
static uint32_t tp_dev_UsrId = 0;
static void tpIsrCallback(void)
{
tpInputCount ++;
// EPAT_LOG(tpIsrCallback, P_INFO, "%d", tpInputCount);
}
static void tpDevInit(void)
{
#if (LCD_ST7789_ENABLE == 1)
tp_interface = api_tp_default(HAL_TP_FT6336);
tp_interface->gpioISR = tpIsrCallback;
tp_dev_UsrId = api_tp_create(HAL_TP_FT6336,tp_interface);
#elif (LCD_AXS15231_ENABLE == 1)
tp_interface = api_tp_default(HAL_TP_AXS15231);
tp_interface->gpioISR = tpIsrCallback;
tp_dev_UsrId = api_tp_create(HAL_TP_AXS15231,tp_interface);
#endif
tpInputCount = 0;
}
/**
* \fn lcdDevInit
* \brief GUI initialization function for LCD device
* \return void
*/
uint32_t scr_dev_UsrId = 0;
uint8_t backLightVal = 100;
static api_scr_infp scr_interface = NULL;
// Function prototype for the LCD status handler
extern void usrLspiHandler(uint32_t stat);
// Function to initialize the LCD device
void lcdDevInit(void)
{
// Reset the clock for the LCD peripheral
GPR_swReset(RST_FCLK_USP2);
#if (defined(PSRAM_FEATURE_ENABLE) && (PSRAM_EXIST == 1) && (!(defined(TYPE_EC718M))))
// Set the clock for the PSRAM (Physical Static RAM)
PSRAM_setClk122M();
// Enable DMA access to the PSRAM
PSRAM_dmaAccessClkCtrl(true);
#endif
scr_interface = api_scr_default(HAL_SCR_ST7789);
scr_interface->spiISR = usrLspiHandler;
scr_dev_UsrId = api_scr_create(HAL_SCR_ST7789,scr_interface);
api_scr_open(scr_dev_UsrId,&backLightVal,1000);
}
#endif // FEATURE_DRIVER_LCD_ENABLE
void sysInit(void)
{
slpManAONIOPowerOn();
slpManAONIOVoltSet(IOVOLT_3_30V);
slpManNormalIOVoltSet(IOVOLT_3_30V);
#ifdef FEATURE_SUBSYS_OPENHAL_ENABLE
deviceManagerInit();
#endif
#ifdef FEATURE_SUBSYS_UARTSERVICE_ENABLE
uartServiceInit();
#endif
#ifdef FEATURE_SUBSYS_OPENHAL_ENABLE
lcdDevInit();
// tpDevInit();
#endif
}
void appInit(void *arg)
{
ECPLAT_PRINTF(UNILOG_PLA_APP, EC_CHIP_VERSION_1, P_INFO, "%s", EC_CHIP_VERSION);
#if defined(FEATURE_CTCC_DM_ENABLE) || defined(FEATURE_CUCC_DM_ENABLE) || defined(FEATURE_CMCC_DM_ENABLE)
ecAutoRegisterInit();
#endif
#ifdef FEATURE_CTWING_CERTI_ENABLE
ecCtwAutoRegisterInit();
#endif
#ifdef FEATURE_APP_TLS_ENABLE
sslEngineInit();
#endif
#ifdef FEATURE_PLAT_HTTP_AT_ENABLE
httpEngineInit();
#endif
#if (RTE_USB_EN == 1)
if (BSP_UsbGetVBUSMode()==1)
{
usb_portmon_task_init() ;
}
#endif
#ifdef FEATURE_PLAT_MISC_ECIDLEP_ENABLE
extern void apPrintIdlePercent(void);
apPrintIdlePercent();
#endif
sysInit();
#ifdef FEATURE_SUBSYS_INPUT_ENABLE
subInputInit();
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
subStatusInit();
#endif
#ifdef FEATURE_SUBSYS_STORAGE_ENABLE
subStorageInit();
#endif
#ifdef FEATURE_SUBSYS_CAMERA_ENABLE
subCameraInit();
#endif
#ifdef FEATURE_SUBSYS_CONSOLE_ENABLE
consoleTaskInit();
#endif
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
extern AppT mainApp;
subApphubInit();
mountApp(&mainApp, 0);
setActiveApp(0);
#endif
}
/**
\fn int main_entry(void)
\brief main entry function.
\return
*/
void main_entry(void)
{
BSP_CommonInit();
osKernelInitialize();
registerAppEntry(appInit, NULL);
if (osKernelGetState() == osKernelReady)
{
osKernelStart();
}
while(1);
}

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@ -1,135 +0,0 @@
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#include <string.h>
#include "FreeRTOS.h"
#include "ostask.h"
#include "cmsis_os2.h"
#include "charge.h"
#ifdef FEATURE_DRIVER_KEYPAD_ENABLE
#include "keypad.h"
#include "kpc.h"
#endif
#ifdef FEATURE_SUBSYS_STATUS_ENABLE
#include "status.h"
#endif
#ifdef FEATURE_SUBSYS_MODE_ENABLE
#include "mode.h"
#endif
#include "bsp_custom.h"
#include DEBUG_LOG_HEADER_FILE
#include "plat_config.h"
#ifdef FEATURE_SUBSYS_APPHUB_ENABLE
#include "app.h"
#include "apphub.h"
#endif
#ifdef FEATURE_SUBSYS_SYSLOG_ENABLE
#include "syslog.h"
#endif
AppT mainApp;
#define APP_TRACE(subId, argLen, format, ...) \
ECOMM_TRACE(UNILOG_TEST, subId, P_VALUE, argLen, format, ##__VA_ARGS__)
AppInfoT mainAppInfo={0};
uint32_t* mainAppWnd={0};
osThreadId_t lcdTaskHandle = NULL;
osEventFlagsId_t lcdEvtHandle = NULL;
void usrLspiHandler(uint32_t stat)
{
// Notify the LCD task if LVGL is initialized
#ifdef FEATURE_SUBSYS_GUI_LVGL_ENABLE
if (lv_is_initialized()) {
bsp_lvgl_flush_ready();
}
#endif
// EPAT_LOG(usrLspiHandler, P_INFO, "0x%x",stat);
// Set the event flag to notify the LCD task
osEventFlagsSet(lcdEvtHandle, 2);
}
void lcdTask(void *argument)
{
while(1) {
osDelay(33);
}
}
void screenInit(void)
{
// Create the LCD event flag
lcdEvtHandle = osEventFlagsNew(NULL);
// Attributes for the LCD task
osThreadAttr_t lcdTaskAttr = {
.name = "lcdTask",
.stack_size = 4096,
.priority = osPriorityNormal,
};
// Create the LCD task
lcdTaskHandle = osThreadNew(lcdTask, NULL, &lcdTaskAttr);
}
/********************************** normal mode begin **********************************/
void normalMainInit(AppInfoT *appInfo)
{
appInfo->initStatus = 1;
#ifdef FEATURE_SUBSYS_SYSLOG_ENABLE
syslogSetLevel(SL_DEBUG);
syslogSetChannel(SC_UART1 | SC_USB);
#endif
screenInit();
}
int32_t normalAppPreDraw()
{
return 0;
}
int32_t normalAppAfterDraw()
{
return 0;
}
int32_t normalAppDestory()
{
return 0;
}
int32_t normalAppMsgProc(AppInfoT *appInfo,AppMsgT *msg, uint32_t reserved2, uint32_t syscallTable)
{
switch(msg->msgType)
{
case APP_STAT_MSG:
break;
default:
break;
}
return 0;
}
/********************************** normal mode end **********************************/
/********************************** test mode end **********************************/
int32_t mainAppInit(AppInfoT *appInfo, uint32_t reserved1, uint32_t reserved2, uint32_t syscallTable)
{
mainApp.preDraw = normalAppPreDraw;
mainApp.msgProc = normalAppMsgProc;
mainApp.afterDraw = normalAppAfterDraw;
mainApp.destory = normalAppDestory;
normalMainInit(appInfo);
return 0;
}
AppT mainApp =
{
.init = mainAppInit,
.info = &mainAppInfo
};
#endif

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@ -1,48 +0,0 @@
AVAILABLE_TARGETS = ec718_0h00
TOOLCHAIN = ARMCC
TOP := ../../../../../../..
BINNAME = ap_$(PROJECT)
BUILD_AT = n
BUILD_AT_DEBUG = n
DRIVER_CIPHER_ENABLE = n
DRIVER_RNG_ENABLE = n
THIRDPARTY_CISONENET_ENABLE = n
THIRDPARTY_CJSON_ENABLE = n
THIRDPARTY_RTT_ENABLE = n
CFLAGS_INC += -I ../inc
ifeq ($(TOOLCHAIN),ARMCC)
PRECINIT_FILE_PATH = PLAT/project/$(TARGET)/ap/apps/driver_example/ARMCC
SYSTEM_FILE_PATH = PLAT/project/$(TARGET)/ap/apps/driver_example/ARMCC
STARTUP_FILE_PATH = PLAT/project/$(TARGET)/ap/apps/driver_example/ARMCC
LINK_FILE_PATH = PLAT/project/$(TARGET)/ap/apps/driver_example/ARMCC
endif
ifeq ($(TOOLCHAIN),GCC)
PRECINIT_FILE_PATH = PLAT/project/$(TARGET)/ap/apps/driver_example/GCC
SYSTEM_FILE_PATH = PLAT/project/$(TARGET)/ap/apps/driver_example/GCC
STARTUP_FILE_PATH = PLAT/project/$(TARGET)/ap/apps/driver_example/GCC
LINK_FILE_PATH = PLAT/project/$(TARGET)/ap/apps/driver_example/GCC
endif
obj-y += PLAT/project/$(TARGET)/ap/apps/driver_example/src/usart_demo.o \
PLAT/project/$(TARGET)/ap/apps/driver_example/src/dma_demo.o \
PLAT/project/$(TARGET)/ap/apps/driver_example/src/timer_demo.o \
PLAT/project/$(TARGET)/ap/apps/driver_example/src/wdt_demo.o \
PLAT/project/$(TARGET)/ap/apps/driver_example/src/gpio_demo.o \
PLAT/project/$(TARGET)/ap/apps/driver_example/src/spi_demo.o \
PLAT/project/$(TARGET)/ap/apps/driver_example/src/i2c_demo.o \
PLAT/project/$(TARGET)/ap/apps/driver_example/src/adc_demo.o \
PLAT/project/$(TARGET)/ap/apps/driver_example/src/app.o \
PLAT/project/$(TARGET)/ap/apps/driver_example/src/bsp_custom.o
include $(TOP)/PLAT/tools/scripts/Makefile.rules

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@ -1,26 +0,0 @@
#! armcc -E
#include "mem_map.h"
LR_IROM1 APP_FLASH_LOAD_ADDR APP_FLASH_LOAD_SIZE { ; load region size_region
UNLOAD_IROM APP_FLASH_LOAD_ADDR APP_FLASH_LOAD_SIZE { ; load address = execution address
*.o (RESET, +First)
.ANY (+RO)
}
UNLOAD_NOCACHE +0 ALIGN 128{
cache*.o (+RO)
}
LOAD_IRAM1 0x00004000 { ; code in ram
*(.ramCode)
}
ScatterAssert(ImageLimit(LOAD_IRAM1) < 0x0000C000)
LOAD_DRAM_SHARED 0x0000C000 0x030000 { ; RW data
.ANY (+RW +ZI)
}
LOAD_DRAM_MCURESEVED 0x0003C000 { ; Mcu Rw and ZI
*(.mcuRWData)
*(.mcuZIData)
}
}

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@ -1,22 +0,0 @@
#ifndef MEM_MAP_H
#define MEM_MAP_H
#define FLASH_XIP_ADDR 0x00800000
#define APP_FLASH_LOAD_ADDR (FLASH_XIP_ADDR+0x20000)
#define APP_FLASH_LOAD_SIZE 0x200000
#define BOOTLOADER_FLASH_LOAD_ADDR (FLASH_XIP_ADDR+0x4000)
#define BOOTLOADER_FLASH_LOAD_SIZE 0x00012000
#define FLASH_MEM_BACKUP_ADDR (FLASH_XIP_ADDR+0x36A000)
#define FLASH_MEM_BACKUP_SIZE 0x4000
/////////////////////////////////////////////////
#endif

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