573 lines
9.8 KiB
C
573 lines
9.8 KiB
C
/****************************************************************************
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*
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* Copy right: 2017-, Copyrigths of EigenComm Ltd.
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* File name: devicemanager.h
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* Description: EC718 devicemanage header file
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* History: Rev1.0 2018-07-12
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*
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****************************************************************************/
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#ifndef SUBSYS_DEVICEMANAGER_H
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#define SUBSYS_DEVICEMANAGER_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "subsys.h"
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#define MAX_IPS_NUM 20
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#define MAX_EXTS_NUM 20
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#define PIN_ALT_FUNC_OFF 8
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/// @brief static dev resource table start ////////////////////////////////////////////////////
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#define PIN_MAX_SLOT 6
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#define GPIO_PIN_MAX_SLOT 2
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#define NPWM_PIN_MAX_SLOT 2
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#define KPC_PIN_MAX_SLOT 3
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#define SWD_PIN_MAX_SLOT 2
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#define SIM_PIN_MAX_SLOT 2
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#define LSPI_PIN_MAX_SLOT 2
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#define CSPI_PIN_MAX_SLOT 2
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#define APWM_PIN_MAX_SLOT 3
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#define PWM_PIN_MAX_SLOT PIN_MAX_SLOT
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typedef enum
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{
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PIN_SLOT0 = 0,
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PIN_SLOT1 = 1,
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PIN_SLOT2 = 2,
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PIN_SLOT3 = 3,
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PIN_SLOT4 = 4,
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PIN_SLOT6 = 5,
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} PinSlotType;
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typedef enum
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{
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PIN_Alt0 = 0,
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PIN_Alt1 = 1,
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PIN_Alt2 = 2,
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PIN_Alt3 = 3,
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PIN_Alt4 = 4,
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PIN_Alt5 = 5,
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PIN_Alt6 = 6,
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} PinAltFunType;
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typedef enum _EPadType
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{
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PAD_MIN = 10,
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PAD_11 = 11,
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PAD_12 = 12,
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PAD_13 = 13,
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PAD_14 = 14,
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PAD_15 = 15,
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PAD_16 = 16,
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PAD_17 = 17,
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PAD_18 = 18,
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PAD_19 = 19,
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PAD_20 = 20,
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PAD_21 = 21,
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PAD_22 = 22,
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PAD_23 = 23,
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PAD_24 = 24,
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PAD_25 = 25,
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PAD_26 = 26,
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PAD_27 = 27,
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PAD_28 = 28,
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PAD_29 = 29,
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PAD_30 = 30,
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PAD_31 = 31,
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PAD_32 = 32,
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PAD_33 = 33,
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PAD_34 = 34,
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PAD_35 = 35,
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PAD_36 = 36,
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PAD_37 = 37,
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PAD_38 = 38,
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PAD_39 = 39,
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PAD_40 = 40,
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PAD_41 = 41,
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PAD_42 = 42,
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PAD_43 = 43,
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PAD_44 = 44,
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PAD_45 = 45,
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PAD_46 = 46,
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PAD_47 = 47,
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PAD_48 = 48,
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PAD_49 = 49,
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PAD_50 = 50,
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PAD_51 = 51,
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PAD_52 = 52,
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PAD_53 = 53,
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PAD_MAX = 54,
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} EPadType;
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typedef enum
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{
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IP_PAD = 1,
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IP_GPIO = 2,
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IP_AGPIO = 3,
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IP_TIMER = 4,
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IP_UART = 5,
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IP_PWM = 6,
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IP_APWM = 7,
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IP_I2C = 8,
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IP_SPI = 9,
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IP_LSPI = 10,
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IP_CSPI = 11,
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IP_I2S = 12,
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IP_ONEWIRE = 13,
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IP_KPC = 14,
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IP_ADC = 15,
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IP_SWD = 16,
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IP_SIM = 17,
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IP_MAX = 18,
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} IpType;
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typedef enum
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{
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DEV_LCD = 1,
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DEV_BLE = 2,
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DEV_WIFI = 3,
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DEV_CODEC = 4,
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} ExtDevType;
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typedef struct
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{
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uint16_t swd_clk_selector;
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uint16_t swd_dio_selector;
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} IpSwdPad;
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typedef struct
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{
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uint16_t sim_clk_selector;
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uint16_t sim_uio_selector;
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uint16_t sim_rst_selector
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} IpSimPad;
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typedef struct
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{
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uint16_t i2c_sck_selector;
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uint16_t i2c_sda_selector;
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} IpI2cPad;
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typedef struct
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{
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uint16_t spi_sclk_selector;
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uint16_t spi_miso_selector;
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uint16_t spi_mosi_selector;
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uint16_t spi_ss_selector;
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} IpSpiPad;
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typedef struct
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{
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uint16_t i2s_mclk_selector;
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uint16_t i2s_bclk_selector;
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uint16_t i2s_lrck_selector;
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uint16_t i2s_din_selector;
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uint16_t i2s_dout_selector;
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} IpI2sPad;
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typedef struct
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{
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uint16_t lspi_clk_selector;
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uint16_t lspi_cs_selector;
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uint16_t lspi_sda_selector;
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uint16_t lspi_wr_selector;
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} IpLspiPad;
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typedef struct
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{
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uint16_t cspi_mclk_selector;
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uint16_t cspi_bclk_selector;
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uint16_t cspi_cs_selector;
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uint16_t cspi_rx0_selector;
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uint16_t cspi_rx1_selector;
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} IpCspiPad;
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typedef struct
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{
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uint16_t uart_tx_selector;
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uint16_t uart_rx_selector;
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uint16_t uart_ctx_selector;
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uint16_t uart_rtx_selector;
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uint16_t uart_dcd_selector;
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uint16_t uart_dtr_selector;
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} IpUartPad;
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typedef struct
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{
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uint16_t gpio_pad_selector;
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} IpGpioPad;
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typedef struct
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{
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uint16_t apwm_pad_selector;
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} IpApwmPad;
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typedef struct
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{
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uint16_t pwm_pad_selector;
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uint16_t npwm_pad_selector;
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} IpPwmPad;
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typedef struct
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{
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uint16_t onewire_pad_selector;
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} IpOneWirePad;
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typedef struct
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{
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uint16_t Kpc_c0_pad_selector;
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uint16_t Kpc_c1_pad_selector;
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uint16_t Kpc_c2_pad_selector;
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uint16_t Kpc_c3_pad_selector;
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uint16_t Kpc_c4_pad_selector;
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uint16_t Kpc_r0_pad_selector;
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uint16_t Kpc_r1_pad_selector;
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uint16_t Kpc_r2_pad_selector;
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uint16_t Kpc_r3_pad_selector;
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uint16_t Kpc_r4_pad_selector;
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} IpKpcPad;
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// ips
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpSwdPad ip_pad[SWD_PIN_MAX_SLOT];
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} IpSwd;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpSimPad ip_pad[SIM_PIN_MAX_SLOT];
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} IpSim;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpSpiPad ip_pad[PIN_MAX_SLOT];
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} IpSpi;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpI2cPad ip_pad[PIN_MAX_SLOT];
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} Ipi2c;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpUartPad ip_pad[PIN_MAX_SLOT];
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} IpUart;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpKpcPad ip_pad[KPC_PIN_MAX_SLOT];
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} IpKpc;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpPwmPad ip_pad[PWM_PIN_MAX_SLOT];
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} IpPwm;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpApwmPad ip_pad[APWM_PIN_MAX_SLOT];
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} IpApwm;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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} IpAdc;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpGpioPad ip_pad[GPIO_PIN_MAX_SLOT];
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} IpGpio;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpGpioPad ip_pad[GPIO_PIN_MAX_SLOT];
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} IpAGpio;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpOneWirePad ip_pad[PIN_MAX_SLOT];
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} IpOnewire;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpI2sPad ip_pad[PIN_MAX_SLOT];
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} IpI2s;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpCspiPad ip_pad[CSPI_PIN_MAX_SLOT];
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} IpCspi;
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typedef struct
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{
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IpType ip_type;
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int8_t ip_index;
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IpLspiPad ip_pad[LSPI_PIN_MAX_SLOT];
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} IpLspi;
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typedef struct
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{
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IpUart uart[4]; //ok
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Ipi2c i2c[2]; //ok
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IpSpi spi[2]; //ok
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IpPwm pwm[6]; //ok
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IpApwm apwm[3]; //ok
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IpAdc adc[4]; //ok
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IpSwd swd[2]; //ok
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IpI2s i2s[3]; //ok
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IpCspi cspi; //ok
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IpLspi lspi; //ok
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IpGpio gpio[39]; //ok
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IpSim sim; //ok
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IpOnewire onewire; //ok
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IpKpc kpc; //ok
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} Ec718IpRes;
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/// @brief static dev resource table end ////////////////////////////////////////////////////
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/// @brief dev node desciption start ////////////////////////////////////////////////////
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typedef enum _dnode_stat
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{
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DNODE_FREE, //no used
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DNODE_IDLE, //opened
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DNODE_USED, //used
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DNODE_INVALIED, //invalid
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} DnodeStat_e;
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typedef enum
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{
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POWER_OFF1, ///< Power off: no operation possible
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POWER_FULL ///< Power on: full operation at maximum performance
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} PowerState_e;
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typedef enum _runtime_mode
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{
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RUNTIME_IDLE,
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RUNTIME_SUSPEND,
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RUNTIME_RESUME,
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} RuntimeMode_e;
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typedef enum _pm_mode{
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PM_COMMON, // common run mode
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PM_LOWPOW, // lowpower run mode
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PM_SLEEP, // sleep mode
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PM_HIB, // super sleep mode
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} PmMode_e;
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typedef struct
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{
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uint32_t hdr;
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} DevHandler_t;
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typedef struct
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{
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int32_t (*open) (DevHandler_t dev_handler);
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int32_t (*close) (DevHandler_t dev_handler);
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int32_t (*write) (DevHandler_t dev_handler,char* buf,uint32_t size);
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int32_t (*read) (DevHandler_t dev_handler,char* buf,uint32_t size);
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int32_t (*ioctrl) (DevHandler_t dev_handler,uint32_t control, int cmd, uint32_t arg);
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int32_t (*runtime) (DevHandler_t dev_handler,RuntimeMode_e run_mode, PmMode_e pm_e);
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int32_t (*powerCtrl) (DevHandler_t dev_handler,PowerState_e state);
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} Dnode_t;
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/// @brief dev node desciption end ////////////////////////////////////////////////////
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/// @brief dev dyn res start ////////////////////////////////////////////////////
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typedef struct
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{
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uint32_t pinValid[4];
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uint32_t pinUnused[4];
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uint32_t pinStat[4];
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Dnode_t *pin_fun;
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} PinTable_t;
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typedef struct
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{
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IpType ip;
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int8_t index;
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int8_t stat;
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Dnode_t *dev_fun;
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} IpDev_t;
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typedef struct
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{
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IpDev_t swd_dev;
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IpSwdPad ip_pad;
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} SwdDev_t;
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typedef struct
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{
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IpDev_t sim_dev;
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IpSimPad ip_pad;
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} SimDev_t;
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typedef struct
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{
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IpDev_t sim_dev;
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IpSpiPad ip_pad;
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} SpiDev_t;
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typedef struct
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{
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IpDev_t i2c_dev;
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IpI2cPad ip_pad;
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} I2cDev_t;
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typedef struct
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{
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IpDev_t uart_dev;
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IpUartPad ip_pad;
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} UartDev_t;
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typedef struct
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{
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IpDev_t kpc_dev;
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IpKpcPad ip_pad;
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} KpcDev_t;
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typedef struct
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{
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IpDev_t pwm_dev;
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IpPwmPad ip_pad;
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} PwmDev_t;
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typedef struct
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{
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IpDev_t apwm_dev;
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IpApwmPad ip_pad;
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} ApwmDev_t;
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typedef struct
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{
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IpDev_t adc_dev;
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} AdcDev_t;
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typedef struct
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{
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IpDev_t gpio_dev;
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IpGpioPad ip_pad;
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} GpioDev_t;
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typedef struct
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{
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IpDev_t agpio_dev;
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IpGpioPad ip_pad;
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} AGpioDev_t;
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typedef struct
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{
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IpDev_t onewire_dev;
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IpOneWirePad ip_pad;
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} OnewireDev_t;
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typedef struct
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{
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IpDev_t i2s_dev;
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IpI2sPad ip_pad;
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} I2sDev_t;
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typedef struct
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{
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IpDev_t cspi_dev;
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IpCspiPad ip_pad;
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} CspiDev_t;
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typedef struct
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{
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IpDev_t cspi_dev;
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IpLspiPad ip_pad;
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} LspiDev_t;
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typedef struct
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{
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UartDev_t uart[4]; //ok
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I2cDev_t i2c[2]; //ok
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SpiDev_t spi[2]; //ok
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PwmDev_t pwm[6]; //ok
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ApwmDev_t apwm[3]; //ok
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AdcDev_t adc[4]; //ok
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SwdDev_t swd[2]; //ok
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I2sDev_t i2s[3]; //ok
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CspiDev_t cspi; //ok
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LspiDev_t lspi; //ok
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GpioDev_t gpio[39]; //ok
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SimDev_t sim; //ok
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OnewireDev_t onewire; //ok
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KpcDev_t kpc; //ok
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} DevTable_t;
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typedef struct
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{
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ExtDevType extdev;
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//extdev stat
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int8_t stat;
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Dnode_t *dev_fun; //ext dev drv
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// connect to ip
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IpType ip;
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int8_t index;
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} EextDev_t;
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typedef struct
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{
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EextDev_t ext[MAX_EXTS_NUM];
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int8_t stat[MAX_EXTS_NUM];
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} ExtDevTable_t;
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typedef struct
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{
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ExtDevTable_t extTable;
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DevTable_t devTable;
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PinTable_t pinTable;
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} DevManagerTable_t;
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/// @brief dev dyn res end ////////////////////////////////////////////////////
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// init(struct dnode* node)
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// open(struct dnode* node)
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// close(struct dnode* node)
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// read(struct dnode* node)
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// write(struct dnode* node)
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// ioctl(struct dnode* node,char inout *param ,char *in ,char *out)
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// deinit(struct dev* node)
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#ifdef __cplusplus
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}
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#endif
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#endif /* SUBSYS_DEVICEMANAGER_H */ |